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AD5663R Datasheet PDF Download - Analog Devices

Номер произв AD5663R
Описание (AD5623R - AD5663R) nanoDAC
Производители Analog Devices
логотип Analog Devices логотип 
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AD5663R Даташит, Описание, Даташиты
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Dual 12-/14-/16-Bit nanoDAC® with
5 ppm/°C On-Chip Reference
AD5623R/AD5643R/AD5663R
FEATURES
Low power, smallest pin-compatible, dual nanoDAC
AD5663R: 16 bits
AD5643R: 14 bits
AD5623R: 12 bits
User-selectable external or internal reference
External reference default
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
10-lead MSOP and 3 mm × 3 mm LFCSP
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale
Per channel power-down
Serial interface up to 50 MHz
Hardware LDAC and CLR functions
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5623R/AD5643R/AD5663R, members of the nanoDAC
family, are low power, dual 12-, 14-, and 16-bit buffered voltage-
out digital-to-analog converters (DAC) that operate from a single
2.7 V to 5.5 V supply and are guaranteed monotonic by design.
The AD5623R/AD5643R/AD5663R have an on-chip reference.
The AD5623R-3/AD5643R-3/AD5663R-3 have a 1.25 V, 5 ppm/°C
reference, giving a full-scale output of 2.5 V; and the AD5623R-5/
AD5643R-5/AD5663R-5 have a 2.5 V, 5 ppm/°C reference,
giving a full-scale output of 5 V. The on-chip reference is off at
power-up, allowing the use of an external reference; and all
devices can be operated from a single 2.7 V to 5.5 V supply.
The internal reference is turned on by writing to the DAC.
The parts incorporate a power-on reset circuit that ensures the
DAC output powers up to 0 V and remains there until a valid
write takes place. The part contains a power-down feature that
reduces the current consumption of the device to 480 nA at 5 V
and provides software-selectable output loads while in power-
down mode.
SCLK
SYNC
DIN
FUNCTIONAL BLOCK DIAGRAM
VDD VREFIN/VREFOUT
LDAC
INTERFACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC A
1.25V/2.5V
REFERENCE
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
BUFFER
VOUTA
VOUTB
AD5623R/AD5643R/AD5663R
POWER-ON
RESET
LDAC CLR
GND
Figure 1.
POWER-DOWN
LOGIC
Table 1. Related Devices
Part No.
Description
AD5663
2.7 V to 5.5 V, dual 16-bit nanoDAC, with external
reference
The low power consumption of this part in normal operation
makes it ideally suited to portable, battery-operated equipment.
The AD5623R/AD5643R/AD5663R use a versatile, 3-wire serial
interface that operates at clock rates up to 50 MHz, and they are
compatible with standard SPI®, QSPI™, MICROWIRE™, and
DSP interface standards. The on-chip precision output amplifier
enables rail-to-rail output swing to be achieved.
PRODUCT HIGHLIGHTS
1. Dual 12-, 14-, and 16-bit DAC.
2. On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
3. Available in 10-lead MSOP and 10-lead, 3 mm ×
3 mm LFCSP.
4. Low power; typically consumes 0.6 mW at 3 V and
1.25 mW at 5 V.
5. 4.5 μs maximum settling time for the AD5623R.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
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AD5663R Даташит, Описание, Даташиты
AD5623R/AD5643R/AD5663R
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AD5623R-5/AD5643R-5/AD5663R-5 ....................................... 3
AD5623R-3/AD5643R-3/AD5663R-3 ....................................... 5
AC Characteristics........................................................................ 6
Timing Characteristics ................................................................ 7
Timing Diagram ........................................................................... 7
Absolute Maximum Ratings............................................................ 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions............................. 9
Typical Performance Characteristics ........................................... 10
Terminology .................................................................................... 18
Theory of Operation ...................................................................... 20
Digital-to-Analog Section ......................................................... 20
Resistor String ............................................................................. 20
REVISION HISTORY
12/06—Rev. 0 to Rev. A
Changes to Table 2............................................................................ 3
Changes to Table 3............................................................................ 5
Changes to Figure 3.......................................................................... 9
Changes to Ordering Guide .......................................................... 28
4/06—Revision 0: Initial Version
Output Amplifier........................................................................ 20
Internal Reference ...................................................................... 20
External Reference ..................................................................... 20
Serial Interface ............................................................................ 20
Input Shift Register .................................................................... 21
SYNC Interrupt .......................................................................... 21
Power-On Reset.......................................................................... 22
Software Reset............................................................................. 22
Power-Down Modes .................................................................. 22
LDAC Function .......................................................................... 23
Internal Reference Setup ........................................................... 24
Microprocessor Interfacing....................................................... 25
Applications Information .............................................................. 26
Using a Reference as a Power Supply....................................... 26
Bipolar Operation Using the AD5663R .................................. 26
Using the AD5663R with a Galvanically Isolated Interface . 26
Power Supply Bypassing and Grounding................................ 27
Outline Dimensions ....................................................................... 28
Ordering Guide .......................................................................... 28
Rev. A | Page 2 of 28
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AD5663R Даташит, Описание, Даташиты
AD5623R/AD5643R/AD5663R
SPECIFICATIONS
AD5623R-5/AD5643R-5/AD5663R-5
VDD = 4.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; VREFIN = VDD; all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE2
AD5663R
Resolution
Relative Accuracy
Differential Nonlinearity
AD5643R
Resolution
Relative Accuracy
Differential Nonlinearity
AD5623R
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Scale Error
Offset Error
Full-Scale Error
Gain Error
Zero-Scale Error Drift
Gain Temperature Coefficient
DC Power Supply Rejection Ratio
DC Crosstalk (External Reference)
DC Crosstalk (Internal Reference)
OUTPUT CHARACTERISTICS3
Output Voltage Range
Capacitive Load Stability
DC Output Impedance
Short-Circuit Current
Power-Up Time
REFERENCE INPUTS
Reference Current
Reference Input Range
Reference Input Impedance
REFERENCE OUTPUT
Output Voltage
Reference Temperature Coefficient3
Output Impedance
B Grade1
Min Typ
Max
16
±8
14
±2
12
±0.5
+2
±1
−0.1
±2
±2.5
−100
10
10
5
25
20
10
0
2
10
0.5
30
4
170
0.75
26
2.495
±5
±10
7.5
±16
±1
±4
±0.5
±1
±0.25
+10
±10
±1
±1.5
VDD
200
VDD
2.505
±10
Unit
Bits
LSB
LSB
Bits
LSB
LSB
Bits
LSB
LSB
mV
mV
% of FSR
% of FSR
μV/°C
ppm
dB
μV
μV/mA
μV
μV
μV/mA
μV
V
nF
nF
Ω
mA
μs
μA
V
V
ppm/°C
ppm/°C
Conditions/Comments
Guaranteed monotonic by design
Guaranteed monotonic by design
Guaranteed monotonic by design
All 0s loaded to DAC register
All 1s loaded to DAC register
Of FSR/°C
DAC code = midscale ; VDD = 5 V ± 10%
Due to full-scale output change;
RL = 2 kΩ to GND or VDD
Due to load current change
Due to powering down (per channel)
Due to full-scale output change;
RL = 2 kΩ to GND or VDD
Due to load current change
Due to powering down (per channel)
RL = ∞
RL = 2 kΩ
VDD = 5 V
Coming out of power-down mode; VDD = 5 V
VREF = VDD = 5.5 V
At ambient
MSOP package models
LFCSP package models
Rev. A | Page 3 of 28
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