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PDF WM8903 Data sheet ( Hoja de datos )
| Número de pieza | WM8903 | |
| Descripción | Ultra Low Power CODEC | |
| Fabricantes | Wolfson Microelectronics | |
| Logotipo |  |
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WM8903
Ultra Low Power CODEC for Portable Audio Applications
DESCRIPTION
The WM8903 is a high performance ultra-low power stereo
CODEC optimised for portable audio applications.
The device features stereo ground-referenced headphone
amplifiers using the Wolfson ‘Class W’ amplifier techniques -
incorporating an innovative dual-mode charge pump
architecture - to optimise efficiency and power consumption
during playback. The ground-referenced outputs eliminate
headphone coupling capacitors. Both headphone and line
outputs include common mode feedback paths to reject
ground noise.
Control sequences for audio path setup can be pre-loaded
and executed by an integrated sequencer to reduce
software driver development and eliminate pops and clicks
via Wolfson’s SilentSwitch™ technology.
The analogue input stage can be configured for single
ended or differential inputs. Up to 3 stereo microphone or
line inputs may be connected. The input impedance is
constant with PGA gain setting.
A stereo digital microphone interface is provided, which can
also be mixed with the mic/line signals at the output mixers.
A dynamic range controller provides compression and level
control to support a wide range of portable recording
applications. Anti-clip and quick release features offer good
performance in the presence of loud impulsive noises.
Common audio sampling frequencies are supported from a
range of external clocks, either directly or generated via the
Frequency Locked Loop (FLL).
The WM8903 can operate directly from a single 1.8V
switched supply. For optimal power consumption, the digital
core can be operated from a 1.0V supply.
FEATURES
4.5mW power consumption for DAC to headphone
playback
DAC SNR 96dB typical, THD -86dB typical
ADC SNR 92dB typical, THD -80dB typical
Control sequencer for pop minimised start-up and shut-
down
Single register write for default start-up sequence
Integrated FLL provides all necessary clocks
- Self-clocking modes allow processor to sleep
- All standard sample rates from 8kHz to 96kHz
Stereo digital microphone input
3 single ended inputs per stereo channel
1 fully differential mic / line input per stereo channel
Digital Dynamic Range Controller (compressor / limiter)
Digital sidetone mixing
Ground-referenced headphone driver
Ground-referenced line outputs
Stereo differential line driver for direct interface to WM9001
speaker driver
40-pin QFN package (5x5mm)
APPLICATIONS
Portable multimedia players
Multimedia handsets
Handheld gaming
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews
Production Data, June 2012, Rev 4.5
Copyright 2012 Wolfson Microelectronics plc
1 page  
Production Data
WM8903
CLOCKING AND SAMPLE RATES................................................................................ 95
CLK_SYS CONTROL ...................................................................................................................................................... 97
CONTROL INTERFACE CLOCKING .............................................................................................................................. 98
AUTOMATIC CLOCKING CONFIGURATION ................................................................................................................. 98
USB CLOCKING MODE ................................................................................................................................................ 100
ADC / DAC OPERATION AT 88.2K / 96K ..................................................................................................................... 100
DIGITAL MICROPHONE (DMIC) OPERATION ............................................................................................................ 101
FREQUENCY LOCKED LOOP (FLL)........................................................................... 101
FREE-RUNNING FLL CLOCK....................................................................................................................................... 105
GPIO OUTPUTS FROM FLL ......................................................................................................................................... 105
EXAMPLE FLL CALCULATION..................................................................................................................................... 105
EXAMPLE FLL SETTINGS............................................................................................................................................ 106
GENERAL PURPOSE INPUT/OUTPUT (GPIO).......................................................... 107
INTERRUPTS .............................................................................................................. 112
CONTROL INTERFACE............................................................................................... 115
CONTROL WRITE SEQUENCER................................................................................ 118
INITIATING A SEQUENCE............................................................................................................................................ 118
PROGRAMMING A SEQUENCE .................................................................................................................................. 119
DEFAULT SEQUENCES ............................................................................................................................................... 122
START-UP SEQUENCE................................................................................................................................................ 122
SHUTDOWN SEQUENCE............................................................................................................................................. 125
POWER-ON RESET .................................................................................................... 127
QUICK START-UP AND SHUTDOWN ........................................................................ 129
QUICK START-UP (DEFAULT SEQUENCE)................................................................................................................ 129
QUICK SHUTDOWN (DEFAULT SEQUENCE) ............................................................................................................ 129
SOFTWARE RESET AND CHIP ID ............................................................................. 130
REGISTER MAP ................................................................................................ 131
REGISTER BITS BY ADDRESS .................................................................................. 134
APPLICATIONS INFORMATION ...................................................................... 172
RECOMMENDED EXTERNAL COMPONENTS .......................................................... 172
MIC DETECTION SEQUENCE USING MICBIAS CURRENT ..................................... 174
PACKAGE DIMENSIONS.................................................................................. 176
IMPORTANT NOTICE ....................................................................................... 177
ADDRESS .................................................................................................................... 177
REVISION HISTORY ......................................................................................... 178
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PD, Rev 4.5, June 2012
5
5 Page 
Production Data
Single-ended stereo record from analogue microphones - IN2L / IN2R pins to ADC output
Test conditions:
L_MODE = R_MODE = 00b (Single ended)
LIN_VOL = RIN_VOL = 11111b (+28.3dB)
Total signal path gain = +34.3dB, incorporating 6dB single-ended to differential conversion gain
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
Single-ended mic input full-scale
Signal Level (for ADC 0dBFS
output)
0.019
-34.3
0.055
Input Resistance
Input Capacitance
DC offset
Rin 10
Cin
At ADC output with
ADC_HPF_ENA=0
12
10
11864
47
Signal to Noise Ratio
SNR
A-weighted
73
Total Harmonic Distortion
THD
-35dBV input
-78
Total Harmonic Distortion + Noise
THD+N
-35dBV input
-77
Channel Level Matching
1kHz signal, -35dBV
+/-3
Power Supply Rejection Ratio
PSRR
1kHz, 100mVpk-pk
60
20kHz, 100mV pk-pk
40
WM8903
MAX
UNIT
Vrms
dBV
Vpk-pk
k
pF
LSBs (24-bit)
LSBs (16-bit)
dBFS
dBFS
dBFS
dB
dB
Differential stereo record from analogue microphones - IN1L+IN2L / IN1R+IN2R pins to ADC output
Test conditions:
L_MODE = R_MODE = 10b (Differential mic)
LIN_VOL = RIN_VOL = 00111b (+30dB)
Total signal path gain = +30dB
PARAMETER
SYMBOL
Differential Mic Input Full Scale
Signal Level
IN1L-IN2L / IN1R-IN2R (for ADC
0dBFS output)
Input Resistance
Input Capacitance
DC Offset
Rin
Cin
Signal to Noise Ratio
Total Harmonic Distortion
Total Harmonic Distortion + Noise
Common Mode Rejection Ratio
Channel Separation
SNR
THD
THD+N
CMRR
Channel Level Matching
PSRR (Referred to Input)
PSRR
TEST CONDITIONS
At ADC output with
ADC_HPF_ENA=0
A-weighted
-31dBV input
-31dBV input
1kHz, 100mVpk-pk
1kHz signal, -31dBV
10kHz signal, -31dBV
1kHz signal, -31dBV
1kHz, 100mVpk-pk
20kHz, 100mV pk-pk
MIN
100
TYP
0.032
-30
0.089
120
10
189813
742
75
-78
-72
60
85
80
+/-1
60
40
MAX
UNIT
Vrms
dBV
Vpk-pk
k
pF
LSBs (24-bit)
LSBs (16-bit)
dBFS
dBFS
dBFS
dB
dB
dB
dB
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PD, Rev 4.5, June 2012
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet WM8903.PDF ] | |
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