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PDF WM8734 Data sheet ( Hoja de datos )

Número de pieza WM8734
Descripción Stereo Audio CODEC
Fabricantes Wolfson Microelectronics 
Logotipo Wolfson Microelectronics Logotipo



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Stereo Audio CODEC
WM8734
DESCRIPTION
The WM8734 is a low power stereo CODEC ideal for
DVD/RW, MP3, media centre and automotive applications
Stereo line inputs are provided, along with a mute function
and programmable line level volume control.
Stereo 24-bit multi-bit sigma delta ADCs and DACs are used
with oversampling digital interpolation and decimation filters.
Digital audio input word lengths from 16-32 bits and
sampling rates from 8kHz to 96kHz are supported.
Stereo audio line level outputs are provided along with anti-
thump mute and power up/down circuitry.
The device is controlled via a 2 or 3 wire serial interface.
The interface provides access to all features including level
controls, mutes, de-emphasis and power management
facilities. The device is available in a 20-lead SSOP
package.
FEATURES
Audio Performance
90dB SNR (‘A’ weighted @ 48kHz) ADC
100dB SNR (‘A’ weighted @ 48kHz) DAC
2.7 – 3.6V Digital Supply Operation
2.7 – 3.6V Analogue Supply Operation
ADC and DAC Sampling Frequency: 8kHz – 96kHz
Selectable ADC High Pass Filter
2 or 3-Wire MPU Serial Control Interface
Programmable Audio Data Interface Modes
I2S, Left, Right Justified or DSP
16/20/24/32 bit Word Lengths
Master or Slave Clocking Mode
Stereo Audio Inputs and Outputs
20-lead SSOP Package
APPLICATIONS
CD and Minidisc Recorder
MP3 Player / Recorder
BLOCK DIAGRAM
AVDD
VMID
AGND
RLINEIN
LLINEIN
CONTROL INTERFACE
W
WM8734
VOL
+12 to -34.5dB,
1.5dB Steps
VOL
+12 to -34.5dB,
1.5dB Steps
CLKIN
DIVIDER
(Div x1, x2)
ADC
ADC
DIGITAL
FILTERS
DAC
MUTE
DAC
MUTE
DIGTAL AUDIO INTERFACE
ROUT
LOUT
WOLFSON MICROELECTRONICS plc
Production Data, August 2013, Rev 4.4
Copyright 2013 Wolfson Microelectronics plc

1 page




WM8734 pdf
WM8734
Production Data
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020 for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
CONDITION
MIN MAX
Digital supply voltage
-0.3V
+3.63V
Analogue supply voltage
-0.3V
+3.63V
Voltage range digital inputs
DGND -0.3V
DVDD +0.3V
Voltage range analogue inputs
AGND -0.3V
AVDD +0.3V
Operating temperature range, TA
Storage temperature after soldering
-40C
-65C
+85C
+150C
Notes:
1. Analogue and digital grounds must always be within 0.3V of each other.
2. The digital supply core voltage (DCVDD) must always be less than or equal to the analogue supply voltage (AVDD)
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
TEST CONDITIONS MIN TYP MAX UNIT
Digital supply range (Core)
DCVDD
2.7 3.6 V
Digital supply range (Buffer)
DBVDD
2.7 3.6 V
Analogue supply range
AVDD
2.7 3.6 V
Ground
DGND, AGND
0V
Total analogue supply current
IAVDD
DCVDD, DBVDD,
16 mA
AVDD = 3.3V
Digital supply current
IDCVDD, IDBVDD
DCVDD, DBVDD
8 mA
AVDD = 3.3V
Standby Current Consumption
5 uA
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PD, Rev 4.4, August 2013
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WM8734 arduino
WM8734
BCLK
DACLRC/
ADCLRC
DACDAT
ADCDAT
tBCH
tBCL
tBCY
tDS
tDD
tLRH
tDH
tLRSU
Production Data
Figure 5 Digital Audio Data Timing – Slave Mode
Test Conditions
AVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 3.3V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK = 256fs unless
otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
Audio Data Input Timing Information
BCLK cycle time
BCLK pulse width high
BCLK pulse width low
DACLRC/ADCLRC set-up
time to BCLK rising edge
tBCY
tBCH
tBCL
tLRSU
50 ns
20 ns
20 ns
10 ns
DACLRC/ADCLRC hold
time from BCLK rising edge
tLRH
10 ns
DACDAT set-up time to
BCLK rising edge
tDS
10 ns
DACDAT hold time from
BCLK rising edge
tDH
10 ns
ADCDAT propagation delay
from BCLK falling edge
tDD
0 10 ns
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PD, Rev 4.4, August 2013
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