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S6E1B86GHA PDF даташит

Спецификация S6E1B86GHA изготовлена ​​​​«Cypress Semiconductor» и имеет функцию, называемую «Microcontroller».

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Номер произв S6E1B86GHA
Описание Microcontroller
Производители Cypress Semiconductor
логотип Cypress Semiconductor логотип 

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S6E1B86GHA Даташит, Описание, Даташиты
PRELIMINARY
S6E1B8 Series
32-bit ARM® Cortex®-M0+
FM0+ Microcontroller
The S6E1B8 Series is a series of highly integrated 32-bit microcontrollers designed for embedded controllers aiming at low power
consumption and low cost. This series has the ARM Cortex-M0+ Processor with on-chip Flash memory and SRAM, and consists of
peripheral functions such as various timers, LCD controller (LCDC), AES, ADC and communication interfaces (UART, CSIO (SPI),
I2C, I2S, Smart Card, and USB). The products which are described in this data sheet are placed into TYPE2-M0+ product categories
in "FM0+ Family Peripheral Manual".
Features
32-bit ARM Cortex-M0+ Core
Processor version: r0p1
Maximum operating frequency: 40.8 MHz
Nested Vectored Interrupt Controller (NVIC): 1 NMI
(non-maskable interrupt) and 24 peripheral interrupt with 4
selectable interrupt priority levels
24-bit System timer (Sys Tick): System timer for OS task
management
Bit Band Operation
Compatible with Cortex-M3 bit band operation.
On-Chip Memory
Flash memory
Up to 512 K+48 Kbytes
Dual bank:
upper bank : 512 Kbytes(64 Kbytes x 8)
lower bank : 48 Kbytes(8 Kbytes x 6)
Read cycle: 0 wait-cycle
Security function for code protection
SRAM
The on-chip SRAM of this series has one independent SRAM .
Up to SRAM: 60 K+4 Kbytes
4Kbytes: can retain value in Deep Standby Mode
USB Interface
USB interface is composed of Device and Host
PLL for USB is built-in, USB clock can be generated by
multiplication of Main clock.
USB Device
USB 2.0 Full-Speed supported
Max 6 EndPoint supported
EndPoint 0 is control transfer
EndPoint 1, 2 can be selected Bulk-transfer,
Interrupt-transfer or Isochronous-transfer
EndPoint 3 to 5 can select Bulk-transfer or
Interrupt-transfer
EndPoint 1 to 5 comprise Double Buffer
The size of each EndPoint is according to the follows
EndPoint 0, 2 to 5 : 64 bytes
EndPoint 1 : 256 bytes
USB host
USB 2.0 Full/Low-Speed supported
Bulk-transfer, Interrupt-transfer and Isochronous-transfer
support
USB Device connected/disconnected automatically detect
IN/OUT token handshake packet automatically
Max 256-byte packet-length supported
Wake-up function supported
LCD Controller (LCDC)
Selectable from 44 SEG × 4 COM (Max) or 40 SEG × 8
COM (Max)
Internal Charge pump can generate 4.6 V at most
Internal divide resistor is contained (selectable from 10 k
or 100 kfor the resistor value)
LCD drive power supply (bias) pin (VV4 to VV0)
Interrupt function synchronized with the LCD module frame
frequency
With blinking function
Inverted display function
Multi-Function Serial Interface (Max 8channels)
128 bytes with Tx/Rx FIFO in all channels (The number of
FIFO steps varies depending on the settings of the
communication mode or bit length.)
The operation mode of each channel can be selected from
one of the following.
UART
CSIO (CSIO is known to many customers as SPI)
I2C
UART
Full duplex double buffer
Parity can be enabled or disabled.
Built-in dedicated baud rate generator
External clock available as a serial clock
Various error detection functions (parity errors, framing
errors, and overrun errors)
CSIO (also known as SPI)
Full duplex double buffer
Built-in dedicated baud rate generator
Overrun error detection function
Serial chip select function (ch1 and ch3 only)
Data length: 5 to 16 bits
Cypress Semiconductor Corporation
Document Number: 001-99223 Rev.**
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised August 31, 2015









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S6E1B86GHA Даташит, Описание, Даташиты
PRELIMINARY
S6E1B8 Series
I2C
Standard-mode (Max: 100 kbps) supported / Fast-mode
(Max 400 kbps) supported.
I2S
Using CSIO (ch.5, ch.6) and I2S clock generator
Supports two transfer protocol
I2S
MSB-justified
Master mode only
Descriptor System Data Transfer Controller (DSTC)
(64 Channels)
The DSTC can transfer data at high-speed without going via
the CPU. The DSTC adopts the Descriptor
system and, following the specified contents of the
Descriptor that has already been constructed on the
memory, can access directly the memory / peripheral device
and performs the data transfer operation.
It supports the software activation, the hardware activation,
and the chain activation functions
A/D Converter (Max: 24 Channels)
12-bit A/D Converter
Successive approximation type
Conversion time: 2.0 μs @ 2.7 V to 3.6 V
Priority conversion available (2 levels of priority)
Scan conversion mode
Built-in FIFO for conversion data storage (for scan
conversion: 16 steps, for priority conversion: 4 steps)
Base Timer (Max: 8 Channels)
The operation mode of each channel can be selected from one
of the following.
16-bit PWM timer
16-bit PPG timer
16/32-bit reload timer
16/32-bit PWC timer
General-Purpose I/O Port
This series can use its pin as a general-purpose I/O port when
it is not used for an external bus or a peripheral function. All
ports can be set to fast general-purpose I/O ports or slow
general-purpose I/O ports. In addition, this series has a port
relocate function that can set to which I/O port a peripheral
function can be allocated.
All ports are Fast GPIO which can be accessed by 1cycle
Capable of controlling the pull-up of each pin
Capable of reading pin level directly
Port relocate function
Up to 102 fast general-purpose I/O ports @120-pin package
Certain ports are 5 V tolerant.
See 4. List of Pin Functions and 5. I/O Circuit Type for the
corresponding pins.
Dual Timer (32-/16-bit Down Counter)
The Dual Timer consists of two programmable 32-/16-bit down
counters. The operation mode of each timer channel can be
selected from one of the following.
Free-running mode
Periodic mode (= Reload mode)
One-shot mode
Multi-Function Timer
The Multi-function Timer consists of the following blocks.
16-bit free-run timer × 3 channels
Input capture × 4 channels
Output compare × 6 channels
ADC start compare × 6 channel
Waveform generator × 3 channels
16-bit PPG timer × 3 channels
IGBT mode is contained.
The following function can be used to achieve the motor
control.
PWM signal output function
DC chopper waveform output function
Dead time function
Input capture function
ADC start function
DTIF (motor emergency stop) interrupt function
Real-Time Clock (RTC with Vbat)
The Real-time Clock counts
year/month/day/hour/minute/second/day of the week from year
01 to year 99.
The RTC can generate an interrupt at a specific time
(year/month/day/hour/minute/second/day of the week) and
can also generate an interrupt in a specific year, in a specific
month, on a specific day, at a specific hour or at a specific
minute.
It has a timer interrupt function generating an interrupt upon
a specific time or at specific intervals.
It can keep counting while rewriting the time.
It can count leap years automatically.
Document Number: 001-99223 Rev.**
Page 2 of 128









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S6E1B86GHA Даташит, Описание, Даташиты
PRELIMINARY
S6E1B8 Series
Watch Counter
The Watch Counter wakes up the microcontroller from the low
power consumption mode. The clock source can be selected
from the main clock, the sub clock, the built-in high-speed CR
clock or the built-in low-speed CR clock.
Interval timer: up to 64 s (sub clock: 32.768 kHz)
External Interrupt Controller Unit
Up to 24 external interrupt input pins
Non-maskable interrupt (NMI) input pin: 1
Watchdog Timer (2 Channels)
The watchdog timer generates an interrupt or a reset when the
counter reaches a time-out value.
This series consists of two different watchdogs, hardware
watchdog and software watchdog.
The hardware watchdog timer is clocked by the built-in
low-speed CR oscillator. Therefore, the hardware watchdog is
active in any low-power consumption modes except RTC, Stop,
Deep standby RTC and Deep standby Stop mode.
CRC (Cyclic Redundancy Check) Accelerator
The CRC accelerator calculates the CRC which has a heavy
software processing load, and achieves a reduction of the
integrity check processing load for reception data and storage.
CCITT CRC16 and IEEE-802.3 CRC32 are supported.
CCITT CRC16 Generator Polynomial: 0x1021
IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7
HDMI-CEC/Remote Control Receiver (Up to 2
Channels)
HDMI-CEC transmitter
Header block automatic transmission by judging Signal
free
Generating status interrupt by detecting Arbitration lost
Generating START, EOM, ACK automatically to output
CEC transmission by setting 1 byte data
Generating transmission status interrupt when transmitting
1 block (1 byte data and EOM/ACK)
HDMI-CEC receiver
Automatic ACK reply function available
Line error detection function available
Remote control receiver
4 bytes reception buffer
Repeat code detection function available
Smart Card Interface (Max 2 Channels)
Compliant with ISO7816-3 specification
Card Reader only/B class card only
Available protocols
Transmitter: 8E2, 8O2, 8N2
Receiver: 8E1, 8O1, 8N2, 8N1, 9N1
Inverse mode
TX/RX FIFO integrated (RX: 16-bytes, TX:16-bytes)
Document Number: 001-99223 Rev.**
AES Calculator
AES (Advanced Encryption Standard) calculator is an AES
common key crypto accelerator that is compliant with FIPS
(Federal Information Processing Standard Publication) 197.
Available key length: 128/192/256-bit
CBC mode and ECB mode support
Clock and Reset
Clocks
A clock can be selected from five clock sources (two external
oscillators, two built-in CR oscillator, and main PLL).
Main clock: 4 MHz to 40 MHz
Sub clock: 32.768 kHz
Built-in high-speed CR clock: 4 MHz
Built-in low-speed CR clock: 100 kHz
Main PLL clock
Resets
Reset request from the INITX pin
Power on reset
Software reset
Watchdog timer reset
Low-voltage detection reset
Clock supervisor reset
Clock Supervisor (CSV)
The Clock Supervisor monitors the failure of external clocks
with a clock generated by a built-in CR oscillator.
If an external clock failure (clock stop) is detected, a reset is
asserted.
If an external frequency anomaly is detected, an interrupt or
a reset is asserted.
Low-Voltage Detector (LVD)
This series monitors the voltage on the VCC pin with a 2-stage
mechanism. When the voltage falls below a designated voltage,
the Low-voltage Detector generates an interrupt or a reset.
LVDR: monitor Vcc and auto-reset operation
LVD1: monitor Vcc and error reporting via an interrupt
LVD2: selectable to monitor Vcc or LVDI and error reporting
via an interrupt
Low Power Consumption Mode
This series has six low power consumption modes.
Sleep
Timer
RTC
Stop
Deep standby RTC (selectable between keeping the value of
RAM and not)
Deep standby Stop (selectable between keeping the value of
RAM and not)
Page 3 of 128










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