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Спецификация CLC111AJP изготовлена «National Semiconductor» и имеет функцию, называемую «Ultra-High Slew Rate/ Closed-Loop Buffer». |
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Детали детали
Номер произв | CLC111AJP |
Описание | Ultra-High Slew Rate/ Closed-Loop Buffer |
Производители | National Semiconductor |
логотип |
6 Pages
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N
CLC111
Ultra-High Slew Rate, Closed-Loop Buffer
June 1999
General Description
The CLC111 is a high-performance, closed-loop, monolithic buffer
designed for applications requiring very high-frequency signals. The
CLC111's high performance includes an extremely fast 800MHz
small signal bandwidth (0.5Vpp) and an ultra high (3500V/µs) slew rate
while requiring only 10.5mA quiescent current. Signal fidelity is
maintained with low harmonic distortion (-62dBc 2nd and 3rd harmonics
at 20MHz). These performance characteristics are for a demanding
100Ω load.
Featuring a patented closed-loop design, the CLC111 offers nearly
ideal unity-gain (0.996) with very low (1.4Ω) output impedance. The
CLC111 is ideally suited for buffering video signals with its 0.15%/
0.04° differential gain and phase performance at 4.43MHz. Power
sensitive applications will benefit from the CLC111's excellent
performance on reduced or single supply voltages.
Features
s Very wideband (800MHz)
s Ultra-high (3500V/µs) slew rate
s Very low output impedance (1.4Ω)
s Low (-62dBc) 2nd/3rd harmonics @ 20MHz
s 60mA output current (±5 supplies)
s Single supply operation (0 to 3V supply min.)
s Evaluation boards and Spice models
Applications
s Video switch buffers
s Test point drivers
s High frequency active filters
s Wideband DC clamping buffer
s High-speed peak detector circuits
Constructed using an advanced, complementary bipolar process and
Comlinear's proven high-performance architectures, the CLC111 is
available in several versions to meet a variety of requirements.
CLC111AJP -40°C to +85°C 8-pin Plastic DIP
CLC111AJE -40°C to +85°C 8-pin Plastic SOIC
CLC111ALC -40°C to +85°C dice
CLC111AMC -55°C to +125°C dice qualified to Method 5008,
MIL-STD-883, Level B
Contact factory for other packages and DESC SMD number.
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
Pinout
DIP & SOIC
Typical Application
CLC111
Single-Supply Circuit
http://www.national.com
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CLC111 EleCctLrCic1a0l9CEhlaecratrcictaelriCshtiacrsac(±teV rccis= t±ic5Vs, RL(±= 1V0c0cΩ=un±le5ssVs,pRecLif=ied1) 00Ω)
PARAMETER
CONDITIONS
TYP MIN AND MAX RATINGS UNITS
Ambient Temperature CLC111AJ
+25°C -40°C +25°C +85°C
SYMBOL
FREQUENCY RESPONSE
small signal bandwidth
gain flatness
flatness
peaking
rolloff
differential gain
differential phase
Vout < 0.5Vpp
Vout < 4.0Vpp
Vout < 0.5Vpp
DC-50MHz
DC-200MHz
DC-200MHz
4.43MHz, 150Ω load
4.43MHz, 150Ω load
800
450
0.02
0.1
0.1
0.15
0.04
400
250
±0.1
1.0
0.8
0.4
0.08
400
250
±0.1
0.5
0.8
0.25
0.08
300
200
±0.2
0.5
1.2
0.25
0.08
MHz
MHz
dB
dB
dB
%
°
SSBW
LSBW
GFL
GFPH
GFRH
DG
DP
TIME DOMAIN RESPONSE
rise and fall time
settling time to ±0.1%
overshoot
slew rate
0.5V step
4.0V step
2.0V step
4V step
4V step
0.6
1.0
16
0
3500
0.8
1.4
20
8
2700
0.8
1.4
20
5
2700
1.1
1.7
20
5
2300
ns
ns
ns
%
V/µsec
TRS
TRL
TS
OS1
SR
DISTORTION AND NOISE PERFORMANCE
2nd harmonic distortion
3rd harmonic distortion
equivalent output noise
2Vpp, 20MHz
2Vpp, 20MHz
voltage
>1MHz
current
>1MHz
-62 -47
-62 -55
4.0 4.8
1.6 4.0
-50 -50
-55 -52
4.8 5.3
3.0 3.0
dBc
dBc
nV/√Hz
pA/√Hz
HD2
HD3
VN
ICN
STATIC DC PERFORMANCE
small signal gain
no load
100Ω load
output resistance
DC
*output offset voltage
average temperature coefficient
* input bias current
average temperature coefficient
power supply rejection ratio
* supply current
no load
0.996
0.98
1.4
2
±30
5
50
-52
10.5
0.994
0.96
3.0
17
±100
30
±187
-48
12
0.994
0.97
2.0
9
15
-48
12
0.992
0.97
2.0
9
±50
15
±100
-46
12
V/V
V/V
Ω
mV
µV/°C
µA
nA/°C
dB
mA
GA1
GA2
RO
VIO
DVIO
IBN
DIBN
PSRR
ICC
MISCELLANEOUS PERFORMANCE
integral endpoint linearity
±2V, full scale
input resistance
input capacitance
CERDIP
Plastic DIP
output voltage range
no load
output current
RL=100Ω
RL=100Ω, 0°C
0° - 70°C
0.2
1
2.5
1.25
3.9
3.5
60
1.0
0.3
3.5
2.0
3.5
+3.1,-2.5
±3.1
50,25
50,35
0.5
0.7
3.5
2.0
3.6
3.2
50
50
0.5
1
3.5
2.0
3.6
3.2
40
50
% ILIN
MΩ RIN
pF CIN
pF CIN
V VO
V VOL
V VOL
mA IO
mA IO
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
Absolute Maximum Ratings
Vcc
Iout output is short circuit protected to
ground, but maximum reliability will be
maintained if Iout does not exceed...
input voltage
maximum junction temperature
operating temperature range
AJ
storage temperature range
lead temperature (soldering 10 sec)
ESD rating
±7.0V
80mA
±Vcc
+150°C
-40°C to +85°C
-65°C to +150°C
+300°C
1000V
Miscellaneous Ratings
Notes:
* AJ : 100% tested at +25°C.
Package Thermal Resistance
Package
Plastic(AJP)
Surface Mount (AJE)
θJC
70°C/W
65°C/W
θJA
125°C/W
145°C/W
Reliability Information
Transistor count
17
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Electrical Characteristics (VCC = +3V or VCC = +5V, -VEE = 0V, TA = +25°C, RL = 100Ω, unless noted)
PARAMETERS
CONDITIONS
FREQUENCY DOMAIN RESPONSE
-3dB bandwidth
gain flatness
flatness
Vout < 0.5Vpp
Vout < 2.0Vpp
Vout < 0.5Vpp
DC to 30MHz
peaking
DC to 200MHz
rolloff
DC to 60MHz
TIME DOMAIN RESPONSE
rise and fall time
overshoot
slew rate
0.5V step
2.0V step
1.0V step
0.5V step
DISTORTION AND NOISE RESPONSE
2nd harmonic distortion
0.5Vpp,20MHz
1.0Vpp,20MHz
3rd harmonic distortion
0.5Vpp,20MHz
1.0Vpp,20MHz
STATIC DC PERFORMANCE
small-signal gain
supply current
AC-coupled
RL= ∞
VCC = 3V VCC = 5V
120 300
210
0.5 0.1
00
1.5 0.25
3.9 1.2
1.5
33
260 425
-46
-55
-44
-64
0.96
2.0
0.97
4.5
UNITS
MHz
MHz
dB
dB
dB
ns
ns
%
V/µs
dBc
dBc
dBc
dBc
V/V
mA
MISCELLANEOUS PERFORMANCE
output voltage range
RL= ∞
RL=100Ω
1.5 3.4 Vpp
1.1 2.6 Vpp
Operation
The CLC111 is a low-power, very high-speed unity-gain
buffer. It uses a closed-loop topology which allows for
accuracy not usually found in high-speed open-loop buffers.
A slew enhanced front end allows for low quiescent power
while not sacrificing ac performance.
Single Supply Operation
Although the CLC111 is specified to operate from split ±5V
power supplies, there is no internal ground reference that
prevents operation from a single voltage power supply. For
single supply operation the input signal should be
biased at a DC value of ½VCC. This can be accomplished
by AC coupling and rebiasing as shown in Figure 1.
The above electrical specifications provide typical perfor-
mance specifications for the CLC111 at 25°C while operat-
ing from a single +3V or a single +5V power supply.
Printed Circuit Layout and Supply Bypassing
As with any high-frequency device, a good PCB layout is
required for optimum performance. This is especially
important for a device as fast as the CLC111.
To minimize capacitive feedthrough, pins 2, 3, 6, and 7
should be connected to the ground plane, as shown in Figure
1. Input and output traces should be laid out as transmission
lines with the appropriate termination resistors very near the
CLC111. On a 0.065 inch epoxy PCB material, a 50Ω
transmission line (commonly called stripline) can be
constructed by using a trace width of 0.1" over a complete
ground plane.
Figure 1 shows recommended power supply bypassing.
The ferrite beads are optional and are recommended only
where additional isolation is needed from high-frequency
(>400MHz) resonances in the power supply.
ferrite
bead (optional)
+5V
C3
6.8µF
+
L1
1
0.01µF
C1
Vin
Rin is chosen
for desired
input impedance.
4 8 Vout
CLC111
Rin 2 3 6 7 Rout
5
-5V
C4
6.8µF
+
L2
C2
ferrite
0.01µF
bead (optional)
Rout is chosen for
desired output impedance.
(CLC111 Ro = 1.4Ω )
Figure 1: Recommended circuit & evaluation
board schematic
Parasitic or load capacitance directly on the output of the
CLC111 will introduce additional phase shift in the device.
This phase shift can decrease phase margin and increase
frequency response peaking. A small series resistor before
the capacitance effectively decouples this effect. The graphs
on the following page illustrate the required resistor value and
the resulting performance vs. capacitance.
Precision buffed resistors (PRP8351 series from Precision
Resistive Products), which have low parasitic reactances,
were used to develop the data sheet specifications. Precision
carbon composition resistors or standard spirally-trimmed
RN55D metal film resistors will work, though they will cause
a slight degradation of ac performance due to their reactive
nature at high frequencies.
Evaluation Boards
Evaluation boards are available from National as part
numbers CLC730012 (DIP) and CLC730045 (SOIC). This
board was used in the characterization of the device and
provides optimal performance. Designers are encouraged to
copy these printed circuit board layouts for their applications.
3 http://www.national.com
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