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CLC532 PDF даташит

Спецификация CLC532 изготовлена ​​​​«National Semiconductor» и имеет функцию, называемую «High-Speed 2:1 Analog Multiplexer».

Детали детали

Номер произв CLC532
Описание High-Speed 2:1 Analog Multiplexer
Производители National Semiconductor
логотип National Semiconductor логотип 

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CLC532 Даташит, Описание, Даташиты
N
CLC532
High-Speed 2:1 Analog Multiplexer
June 1999
General Description
The CLC532 is a high-speed 2:1 multiplexer with active input and
output stages. The CLC532 also employs a closed-loop design which
dramatically improves accuracy. This monolithic device is constructed
using an advanced high-performance bipolar process.
The CLC532 has been specifically designed to provide settling times
of 17ns to 0.01%. This, coupled with the adjustable noise-bandwidth,
makes the CLC532 an ideal choice for infrared and CCD imaging
systems. Channel-to-channel isolation is better than 80dB @
10MHz. Low distortion (80dBc) and spurious signal levels make the
CLC532 a very suitable choice for both I/Q processors and receivers.
The CLC532 is offered over both the industrial and military temperature
ranges. The Industrial versions, CLC532AJP\AJE\AID, are specified
from -40°C to +85°C and are packaged in 14-pin plastic DIP's, 14-pin
SOIC's and 14-pin Side-Brazed packages. The extended temperature
versions,CLC532A8B/A8D/A8L-2,arespecifiedfrom-55°Cto+125°C
and are packaged in a 14-pin hermetic DIP and 20-terminal LCC
packages. (Contact factory for LCC and CERDIP availability.)
Ordering Information ...
CLC532AJP
-40oC to +85oC
14-pin plastic DIP
CLC532AJE
-40oC to +85oC
14-pin plastic SOIC
CLC532ALC
-40oC to +85oC
dice
CLC532AMC
-55oC to +125oC dice, MIL-STD-833
CLC532A8B
-55oC to +125oC 14-pin CERDIP;
MIL-STD-883
CLC532A8L-2A -55oC to +125oC 20-terminal LCC;
MIL-STD-883
Contact factory for other packages and DESC SMD number.
Features
s 12-bit settling (0.01%) - 17ns
s Low noise - 32µVrms
s High isolation - 80dB @ 10MHz
s Low distortion - 80dBc @ 5MHz
s Adjustable bandwidth - 190MHz (max)
Applications
s Infrared system multiplexing
s CCD sensor signals
s Radar I/Q switching
s High definition video HDTV
s Test and calibration
Typical Application
CHANNEL A
RIN
CHANNEL B
RIN
2
1
INA
CCOMP1
12
11
CLC532
4
3
INB
7
6
10
DREF
VOUT
RL
CCOMP2
CHANNEL
SELECT
SELECT OUTPUT
1 Channel A
0 Channel B
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
20-Terminal LCC
Pinout
DIP & SOIC
87654
DREF 9
SELECT 10
NC 11
VEE 12
VEE 13
TOP VIEW
14 15 16 17 18
INDEX CORNER
3 INA
2 GND
1 NC
20 +Vcc
19 +Vcc
GND
INA
GND
INB
DGND
DREF
SELECT
1
2
3
4
5
6
7
14 +VCC
13 +VCC
12 COMP1
11 OUTPUT
10 COMP2
9 VEE
8 VEE
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CLC532 Даташит, Описание, Даташиты
Electrical Characteristics (+VCC=+5.0V; -VEE=-5.2V; RIN=50; RL=500; CCOMP=10pF; ECL Mode, pin 6 = NC)
PARAMETER1
Case Temperature
CONDITIONS
CLC532AJP/AJE/AIB
TYP
+25°C
MAX/MIN RATINGS2
-40°C
+25°C
+85°C
UNITS SYMBOL
FREQUENCY DOMAIN PERFORMANCE
-3dB bandwidth
-3dB bandwidth
gain flatness
peaking
VOUT<0.1Vpp
V =2Vpp
OUT
VOUT<0.1Vpp
0.1MHz to 200MHz
190
140
140
110
MHz
SSBW
45
35
35
30
MHz
LSBW
0.2 0.7 0.7 0.8 dB GFP
rolloff
0.1MHz to 100MHz
1.0 1.8 1.8 2.6 dB GFR
linear phase deviation
dc to 100MHz
2.0
deg LPD
differential gain
differential phase
crosstalk rejection
CCOMP = 5pF; RL=150
0.05
% DG
C
COMP
=
5pF;
RL=150
0.01
deg DP
2Vpp, 10MHz
80 75 75 74 dB CT10
2Vpp, 20MHz
74 69 69 68 dB CT20
2Vpp, 30MHz
68 63 63 62 dB CT30
TIME DOMAIN PERFORMANCE
rise and fall time
0.5V step
2V step
settling time
2V step; from 50% VOUT ±0.0025%
±0.01%
±0.1%
overshoot
2.0V step
slew rate
2.7 3.3 3.3 3.8 ns TRS
10
12.5
12.5
14.5
ns
TRL
35 ns TS14
17 24 24 27 ns TSP
13 18 18 21 ns TSS
2 5 5 6 % OS
160
130
130
110
V/µs
SR
SWITCH PERFORMANCE
channel to channel switching time
50% SELECT to 10%VOUT
5
7
7
8 ns SWT10
(2V step at output)
50% SELECT to 90%V
15
20
20
23 ns SWT90
OUT
switching transient
30 mV ST
DISTORTION AND NOISE PERFORMANCE
2nd harmonic distortion
2Vpp, 5MHz
3rd harmonic distortion
2Vpp, 5MHz
equivalent input noise
spot noise voltage
>1MHz
integrated noise
1MHz to 100MHz
spot noise current
80 67 67 67 dBc HD2
86 68 68 68 dBc HD3
3.1 nV/Hz SNF
32 42 42 46 µVrms INV
3 pA/Hz SNC
STATIC AND DC PERFORMANCE
* analog output offset voltage
temperature coefficient
analog output offset voltage matching
* analog input bias current
temperature coefficient
analog input bias current matching
analog input resistance
analog input capacitance
* gain accuracy
±2V
gain matching
±2V
integral endpoint non-linearity
±1V (full scale)
output voltage
no load
output current
output resistance
dc
1
15
TBD
50
0.3
TBD
200
2
0.998
TBD
0.02
±3.4
45
1.5
6.5
90
250
2.0
90
3.0
0.988
0.05
2.4
20
4.0
3.5
120
120
2.5
0.988
0.03
2.8
30
2.5
5.5
20
120
0.8
120
2.5
0.988
0.03
2.8
30
2.5
mV
µV/°C
mV
µA
µA/°C
µA
k
pF
V/V
V/V
%FS
V
mA
VOS
DVIO
VOSM
IBN
DIBN
IBNM
RIN
CIN
GA
GAM
ILIN
VO
IO
RO
DIGITAL INPUT PERFORMANCE
ECL mode (pin 6 floating)
input voltage logic HIGH
input voltage logic LOW
input current logic HIGH
input current logic LOW
TTL mode (pin 6 = +5V)
input voltage logic HIGH
input voltage logic LOW
input current logic HIGH
input current logic LOW
-1.1 -1.1 -1.1 V
VIH1
-1.5 -1.5 -1.5 V
VIL1
14 50 30 30 µA IIH1
50
270 110 110 µA
IIL1
2.0 2.0 2.0 V
VIH2
0.8 0.8 0.8 V
VIL2
14 50 30 30 µA IIH2
50
270 110 110 µA
IIL2
POWER REQUIREMENTS
* supply current (+V = +5.0V)
CC
* supply current (-VEE = -5.2V)
nominal power dissipation
* power supply rejection ratio
no load
no load
no load
23 30 28 25 mA ICC
24 31 30 26 mA IEE
240 mW PD
73 60 64 64 dB PSRR
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
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CLC532 Даташит, Описание, Даташиты
Recommended Operating Conditions
Absolute Maximum Ratings3
positive supply voltage (+V )
CC
negative supply voltage (-VEE)
differential voltage between any two GND’s
analog input voltage range
SELECT input voltage range (TTL mode)
SELECT input voltage range (ECL mode)
C range2
COMP
thermal data
14-pin plastic
14-pin Cerdip
14-pin SOIC
20-terminal LCC
θJC(°C/W)
55
35
35
35
θJA(°C/W)
100
85
105
50
+5V
-5.2V or -5.0V
10mV
±2V
0.0V to +3.0V
-2.0V to 0.0V
0pF to 100pF
positive supply voltage (+VCC)
negative supply voltage (-VEE)
differential voltage between any two GND’s
analog input voltage range
digital input voltage range
output short circuit duration (output shorted to GND)
junction temperature
operating temperature range
CLC532AJP/AJE/AIB
storage temperature range
lead solder duration (+300°C)
ESD rating
transistor count
-0.5V to +7.0V
+0.5V to -7.0V
200mV
-VEE to +VCC
-V to +V
EE CC
Infinite
+150°C
-40°C to +85°C
-65°C to +150°C
10 sec
<500V
74
Note 1: Test levels are as follows:
* AJ : 100% tested at +25°C.
Note 2: The CLC532 does not require external CCOMP capacitors for proper
operation.
Note 3: Absolute maximum ratings are limiting values, to be applied individually,
and beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied. Exposure to
maximum ratings for extended periods may affect device reliability.
System Timing Diagram
A
SELECT
B
90%
OUTPUT
10%
SWT90
SWT10
SETTLING ERROR
WINDOW
TSx
TRx
TRx
CHANNEL A = +1V
CHANNEL B = -1V
OS
... where TSx is TS14 or TSP or TSS,
and TRx is TRS ro TSL.
Switching Transient Timing Diagram
A
SELECT
B
OUTPUT
ST
~~ 2ns
Channel A = 0V
Channel B = 0V
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