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CLC5958SLB PDF даташит

Спецификация CLC5958SLB изготовлена ​​​​«National Semiconductor» и имеет функцию, называемую «14-bit/ 52MSPS A/D Converter».

Детали детали

Номер произв CLC5958SLB
Описание 14-bit/ 52MSPS A/D Converter
Производители National Semiconductor
логотип National Semiconductor логотип 

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CLC5958SLB Даташит, Описание, Даташиты
N
CLC5958
14-bit, 52MSPS A/D Converter
September 1999
General Description
The CLC5958 is a monolithic 14-bit, 52MSPS analog-to-digital
converter. The ultra-wide dynamic range and high sample rate of
the device make it an excellent choice for wideband receivers
found in multi-channel basestations. The CLC5958 integrates a
low distortion track-and-hold amplifier and a 14-bit multi-stage
quantizer on a single die. Other features include differential
analog inputs, low jitter differential clock inputs, an internal
bandgap voltage reference, and CMOS/TTL compatible outputs.
The CLC5958 is fabricated on the National ABIC-V 0.8 micron
BiCMOS process.
Features
• 14-bit
• 52MSPS
• Ultra-wide dynamic range
Noise floor: -72dBFS
SFDR: 90dB
• Excellent performance to Nyquist
• IF sampling capability
• Very small package: 48-pin CSP
• Programmable output levels:
3.3V to 5V
The CLC5958 features a 90dB spurious free dynamic range
(SFDR) and a 70dB signal to noise ratio (SNR). The balanced
differential analog inputs ensure low even-order distortion, while
the differential clock inputs permit the use of balanced clock signals
to minimize clock jitter. The 48-pin CSP package provides an
extremely small footprint for applications where space is a critical
consideration. The package also provides a very low thermal
resistance to ambient. The CLC5958 may be operated with a
single +5V power supply. Alternatively, an additional supply may
be used to program the digital output levels over the range of
+3.3V to +5V. Operation over the industrial temperature range of
-40°C to +85°C is guaranteed. National Semiconductor tests
each part to verify compliance with the guaranteed specifications.
Applications
• Multi-channel basestations
• Multi-standard basestations:
GSM, WCDMA, DAMPS, etc.
• Smart antenna systems
• Wireless local loop
• Wideband digital communications
Actual Size
(Bottom View)
Single-Tone Output Spectrum
0
Sample Rate = 52MSPS
Input Frequency = 5MHz
-20
-40
-60
-80
-100
-120
0
5 10 15 20
Frequency (MHz)
25
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
Output Response with GSM 1800 Blocker
-20
Full Scale = -24dBM
Res. BW = 200KHz
-40
-25dBm blocker
-60
-80
-101dBm reference
-100
-120
0
5 10 15 20
Frequency (MHz)
25
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CLC5958SLB Даташит, Описание, Даташиты
CLC5958 Electrical Characteristics (Vcc= +5V, DVcc= +3.3V, 52MSPS; unless specified, Tmin = -40°C, Tmax = +85°C)
PARAMETERS
CONDITIONS
TEMP
RATINGS
UNITS NOTES
MIN TYP MAX
RESOLUTION
DIFF. INPUT VOLTAGE RANGE
MAXIMUM CONVERSION RATE
SNR
SFDR
SFDR EXCLUDING 2nd & 3rd HARM.
NO MISSING CODES
fin = 10MHZ, Ain = -0.6dBFS
fin = 10MHZ, Ain = -0.6dBFS
fin = 10MHZ, Ain = -0.6dBFS
fin = 10MHZ, Ain = -0.6dBFS
Full
Full
Full
+25°C
+25°C
+25°C
+25°C
NOISE AND DISTORTION
noise floor
fin = 5MHz
Ain = -1dBFS
fin = 5MHz
Ain = -20dBFS
2nd & 3rd harmonic distortion (w/o dither)
fin = 5MHz
Ain = -1dBFS
fin = 20MHz
Ain = -1dBFS
fin = 70MHz
Ain = -3dBFS
next worst harmonic distortion (w/o dither)
fin = 5MHz
Ain = -1dBFS
fin = 20MHz
Ain = -1dBFS
fin = 70MHz
Ain = -3dBFS
worst harmonic distortion (with dither)
fin = 5MHz
Ain = -6dBFS
fin = 20MHz
Ain = -6dBFS
fin = 70MHz
Ain = -6dBFS
fin = 70MHz (2nd & 3rd excluded) Ain = -6dBFS
2-Tone IM distortion (w/o dither)
fin1 =12MHz, fin2 = 15MHz
Ain1 = Ain2 = -7dBFS
SINAD (w/o dither)
fin = 5MHz
Ain = -1dBFS
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
CLOCK RELATED SPURIOUS TONES
fs/8, fs/4
next worst clock spur
calibration sideband coefficient
+25°C
+25°C
+25°C
14
2.048
52 65
69 71
80 90
85 92
Guaranteed
-71.0
-72.0
-90
-87
-78
-92
-90
-90
-95
-95
-82
-95
-100
69
-95
-100
100e-6
Bits
V
MSPS
dBFS
dB
dB
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dB
dBFS
dBFS
1
1
1
1
1
1
2
3
4
5
6
DC ACCURACY AND PERFORMANCE
differential non-linearity
integral non-linearity
offset error
gain error
+25°C
±0.3
LSB
+25°C
±1.5
LSB
+25°C
±2.0
mV
+25°C 2 % of FS
DYNAMIC PERFORMANCE
large-signal bandwidth
aperture jitter
+25°C
210
MHz
+25°C 0.5 ps(rms)
TIMING
effective aperture delay (tA)
pipeline delay (tP)
output buffer delay (to)
data valid buffer delay (tDAV)
ANALOG INPUT CHARACTERISTICS
single-ended input resistance
single-ended capacitance
+25°C
-0.2
ns
Full 3 clk cycle
+25°C
6.6
ns
+25°C
6.6
ns
+25°C
+25°C
500
3.6
pF
ENCODE INPUT CHARACTERISTICS
VIH
VIL
differential input swing
IIL
IIH
Full 3.9
Full 3.0
Full 0.2
Full 2
Full 25
4.5
3.8
V
V
V
µA
µA
7
7
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
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CLC5958SLB Даташит, Описание, Даташиты
CLC5958 Electrical Characteristics (Vcc= +5V, DVcc= +3.3V, 52MSPS; unless specified, Tmin = -40°C, Tmax = +85°C)
PARAMETERS
CONDITIONS
TEMP
RATINGS
UNITS NOTES
MIN TYP MAX
DIGITAL OUTPUT CHARACTERISTICS
VOH
IOH = 50µA
VOL IOL = 50µA
Full 3.2
Full
V
0.1 V
SUPPLY CHARACTERISTICS
+5V supply current (VCC)
+3.3V supply current (DVCC)
power dissipation
VCC power supply rejection ratio
+25°C
+25°C
+25°C
+25°C
260 300
mA
32 40 mA
1.4 W
0.75 mV/V
1
1
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
CLC5958NToimteinsg Diagram
1) These parameters are 100% tested at 25°C.
2) Harmonics and clock spurious are removed in noise
measurements.
3) 4th or higher harmonic.
4) Low frequency dither injected in the DC to 500KHz band.
5) Next worst clock spur is a subharmonic of fs, but not fs/8 or fs/4.
See text on spurious.
6) See text on calibration sidebands in the application
information section.
7) Encode levels are referenced to VCC, i.e. the minimum VIH value is
1.1V below VCC, and the maximum VIH value is 0.5V below VCC.
Analog
Input
ENCODE
Data
DAV
N
tO
N+1
tA
N+1
N-3
tDAV
N+2
N-2
N+3
N-1
N
CLC5958 Timing Diagram
tO: Delay from rising edge of
ENCODE to output data
transition – nominally 6.6ns
tDAV: Delay from falling edge of
ENCODE to rising edge of DAV
– nominally 6.6ns
tA: Effective aperture delay
– nominally -0.2ns
Absolute Maximum Ratings
positive supply voltage
differential voltage between any two grounds
analog input voltage range
digital input voltage range
output short circuit duration (one-pin to ground)
junction temperature
storage temperature range
lead solder duration (+240°C)
(VCC) -0.5V to +6V
<200mV
GND to VCC
-0.5V to +VCC
infinite
175°C
-65°C to 150°C
5sec
Note: Absolute maximum ratings are limiting values, to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied. Exposure to
maximum ratings for extended periods may affect device reliability.
Recommended Operating Conditions
positive supply voltage (VCC)
analog input voltage range
input coupling
operating temperature range
digital output supply voltage (DVCC)
analog input common mode voltage
+5V ±5%
2.048Vpp diff.
AC
-40°C to +85°C
+3.3V ±5%
Vcm ±0.025V
Package Thermal Resistance
Package
48-pin CSP
θJA
39°C/W
θJC
5°C/W
Package Transistor Count
Transistor count
10,000
Ordering Information
Model
CLC5958SLB
CLC5958PCASM
Temperature Range
-40°C to +85°C
Description
48-pin CSP (industrial temperature range)
Fully loaded evaluation board with CLC5958 … ready for test.
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Номер в каталогеОписаниеПроизводители
CLC5958SLB14-bit/ 52MSPS A/D ConverterNational Semiconductor
National Semiconductor

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