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74LVC4066 PDF даташит

Спецификация 74LVC4066 изготовлена ​​​​«Philips» и имеет функцию, называемую «Quad bilateral switches».

Детали детали

Номер произв 74LVC4066
Описание Quad bilateral switches
Производители Philips
логотип Philips логотип 

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74LVC4066 Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
74LVC4066
Quad bilateral switches
Product specification
2003 Aug 12









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74LVC4066 Даташит, Описание, Даташиты
Philips Semiconductors
Quad bilateral switches
Product specification
74LVC4066
FEATURES
Very low ON resistance:
– 7.5 (typical) at VCC = 2.7 V
– 6.5 (typical) at VCC = 3.3 V
– 6 (typical) at VCC = 5 V.
ESD protection:
– HBM EIA/JESD22-A114-A Exceeds 2000 V
– MM EIA/JESD22-A115-A Exceeds 200 V.
High noise immunity
CMOS low power consumption
Latch up performance exceeds 250 mA
Complies with JEDEC standard no. 8-1A
Direct interface TTL-levels.
DESCRIPTION
The 74LVC4066 is a high-speed Si-gate CMOS device.
The 74LVC4066 has four independent analog switches.
Each switch has two input/output terminals (nY and nZ)
and an active HIGH enable input (nE). When nE is LOW,
the analog switch is turned off.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf 2.5 ns.
SYMBOL
PARAMETER
tPZH/tPZL
turn-on time E to Vos
tPHZ/tPLZ
turn-off time E to Vos
CI input capacitance
CPD power dissipation capacitance
CS switch capacitance
CONDITIONS
CL = 50 pF; RL = 500 ; VCC = 3 V
CL = 50 pF; RL = 500 ; VCC = 5 V
CL = 50 pF; RL = 500 ; VCC = 3 V
CL = 50 pF; RL = 500 ; VCC = 5 V
VCC = 3 V
VCC = 3.3 V; notes 1 and 2
OFF-state
ON-state
TYPICAL
2.5
1.9
3.4
2.5
3.5
12.5
8.0
14.0
UNIT
ns
ns
ns
ns
pF
pF
pF
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ((CL + CS) × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
CS = switch capacitance.
2. The condition is VI = GND to VCC.
2003 Aug 12
2









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74LVC4066 Даташит, Описание, Даташиты
Philips Semiconductors
Quad bilateral switches
FUNCTION TABLE
See note 1.
INPUT nE
L
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
TYPE NUMBER
74LVC4066D
74LVC4066PW
74LVC4066BQ
TEMPERATURE
RANGE
40 to +125 °C
40 to +125 °C
40 to +125 °C
PINS
14
14
14
PINNING
PIN SYMBOL
DESCRIPTION
1 1Y
independent input/output
2 1Z
independent output/input
3 2Z
independent output/input
4 2Y
independent input/output
5 2E
enable input (active HIGH)
6 3E
enable input (active HIGH)
7 GND
ground (0 V)
8 3Y
independent input/output
9 3Z
independent output/input
10 4Z
independent output/input
11 4Y
independent input/output
12 4E
enable input (active HIGH)
13 1E
enable input (active HIGH)
14 VCC
supply voltage
Product specification
74LVC4066
SWITCH
OFF
ON
PACKAGE
PACKAGE
SO14
TSSOP14
DHVQFN14
MATERIAL
plastic
plastic
plastic
CODE
SOT108-2
SOT402-1
SOT762-1
handbook, halfpage
1Y 1
1Z 2
2Z 3
2Y 4
2E 5
3E 6
GND 7
14 VCC
13 1E
12 4E
4066 11 4Y
10 4Z
9 3Z
8 3Y
MNB109
Fig.1 Pin configuration SO14 and TSSOP14.
2003 Aug 12
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