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74HC4002-Q100 PDF даташит

Спецификация 74HC4002-Q100 изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Dual 4-input NOR gate».

Детали детали

Номер произв 74HC4002-Q100
Описание Dual 4-input NOR gate
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74HC4002-Q100 Даташит, Описание, Даташиты
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
Rev. 1 — 18 July 2012
Product data sheet
1. General description
The 74HC4002-Q100; 74HCT4002-Q100 is a dual 4-input NOR gate. Inputs also include
clamp diodes, this enables the use of current limiting resistors to interface inputs to
voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Complies with JEDEC standard JESD7A
Low-power dissipation
Input levels:
For 74HC4002-Q100: CMOS level
For 74HCT4002-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
74HC4002D-Q100 40 C to +125 C
74HCT4002D-Q100
SO14
plastic small outline package; 14 leads; body width
3.9 mm
74HC4002PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT402-1









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74HC4002-Q100 Даташит, Описание, Даташиты
NXP Semiconductors
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
4. Functional diagram
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DDD
Fig 1. Functional diagram
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Fig 2. Logic symbol
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DDD
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DDD
Fig 3. IEC Logic symbol
5. Pinning information
5.1 Pinning
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Fig 4. Logic diagram
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DDD
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Fig 5. Pin configuration SOT108-1
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Fig 6. Pin configuration SOT402-1
74HC_HCT4002_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 July 2012
© NXP B.V. 2012. All rights reserved.
2 of 14









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74HC4002-Q100 Даташит, Описание, Даташиты
NXP Semiconductors
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
5.2 Pin description
Table 2. Pin description
Symbol
1Y
1A, 1B, 1C, 1D
n.c.
GND
2Y
2A, 2B, 2C, 2Y
VCC
Pin
1
2, 3, 4, 5
6, 8
7
13
9, 10, 11, 12
14
6. Functional description
Description
data output
data input
not connected
ground (0 V)
data output
data input
supply voltage
Table 3.
Input
nA
L
H
X
X
X
Function table[1]
nB
L
X
H
X
X
nC
L
X
X
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
7. Limiting values
nD
L
X
X
X
H
Output
nY
H
L
L
L
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP14 package
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
0.5 V < VO < VCC + 0.5 V
0.5
[1] -
[1] -
-
-
50
65
[2]
-
+7
20
20
25
50
-
+150
V
mA
mA
mA
mA
mA
C
750 mW
SO14, and (T)SSOP14
packages
- 500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
74HC_HCT4002_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 July 2012
© NXP B.V. 2012. All rights reserved.
3 of 14










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