74HCT157 Datasheet PDF - NXP Semiconductors
| Part Number | 74HCT157 | |
| Description | Quad 2-input multiplexer | |
| Manufacturers | NXP Semiconductors | |
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74HC157; 74HCT157
Quad 2-input multiplexer
Rev. 8 — 28 December 2015
Product data sheet
1. General description
The 74HC157; 74HCT157 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT157 are quad 2-input multiplexers which select 4 bits of data from two
sources under the control of a common data select input (S). The enable input (E) is
active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of
all other input conditions.
Moving the data from two groups of registers to four common output buses is a common
use of the 74HC/HCT157. The state of the common data select input (S) determines the
particular register from which the data comes. It can also be used as function generator.
The device is useful for implementing highly irregular logic by generating any four of the
16 different functions of two variables with one variable common. The 74HC/HCT157 is
logic implementation of a 4-pole, 2-position switch, where the position of the switch is
determined by the logic levels applied to S.
The logic equations are:
1Y = E (1I1 S + 1I0 S)
2Y = E (2I1 S + 2I0 S)
3Y = E (3I1 S + 3I0 S)
4Y = E (4I1 S + 4I0 S)
The 74HC/HCT157 is identical to the 74HC158 but has non-inverting (true) outputs.
2. Features and benefits
Low-power dissipation
Complies with JEDEC standard no. 7A
Input levels:
For 74HC157: CMOS level
For 74HCT157: TTL level
Non-inverting data path
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C and from 40 C to +125 C
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NXP Semiconductors
74HC157; 74HCT157
Quad 2-input multiplexer
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
VCC
VI
VO
Tamb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
9. Static characteristics
74HC157
Min Typ Max
2.0 5.0 6.0
0 - VCC
0 - VCC
40 +25 +125
- - 625
- 1.67 139
- - 83
74HCT157
Min Typ Max
4.5 5.0 5.5
0 - VCC
0 - VCC
40 +25 +125
---
- 1.67 139
---
Unit
V
V
V
C
ns/V
ns/V
ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C
to +85 C
Min Typ Max Min Max
74HC157
VIH HIGH-level VCC = 2.0 V
input voltage VCC = 4.5 V
1.5 1.2
3.15 2.4
-
-
1.5
3.15
-
-
VCC = 6.0 V
4.2 3.2 -
4.2
-
VIL LOW-level VCC = 2.0 V
input voltage VCC = 4.5 V
- 0.8 0.5
- 2.1 1.35
-
-
0.5
1.35
VCC = 6.0 V
- 2.8 1.8
-
1.8
VOH HIGH-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
1.9 2.0 -
1.9
-
IO = 20 A; VCC = 4.5 V
4.4 4.5 -
4.4
-
IO = 20 A; VCC = 6.0 V
5.9 6.0 -
5.9
-
IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 -
3.84
-
IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 -
5.34
-
VOL LOW-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
- 0 0.1 -
0.1
IO = 20 A; VCC = 4.5 V
- 0 0.1 -
0.1
IO = 20 A; VCC = 6.0 V
- 0 0.1 -
0.1
IO = 4.0 mA; VCC = 4.5 V
- 0.15 0.26 -
0.33
IO = 5.2 mA; VCC = 6.0 V
- 0.16 0.26 -
0.33
II
input leakage VI = VCC or GND; VCC = 6.0 V -
- 0.1 -
1.0
current
ICC supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
- - 8.0 -
80
Tamb = 40 C to Unit
+125 C
Min Max
1.5 - V
3.15 - V
4.2 - V
- 0.5 V
- 1.35 V
- 1.8 V
1.9 - V
4.4 - V
5.9 - V
3.7 - V
5.2 - V
- 0.1 V
- 0.1 V
- 0.1 V
- 0.4 V
- 0.4 V
- 1.0 A
- 160 A
74HC_HCT157
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 28 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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