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PDF S25FL216K Data sheet ( Hoja de datos )
| Número de pieza | S25FL216K | |
| Descripción | 16-Mbit 3.0 V Serial Flash Memory | |
| Fabricantes | Cypress | |
| Logotipo |  |
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Distinctive Features
Single power supply operation
– Full voltage range: 2.7 to 3.6V
16-Mbit Serial Flash
– 16-Mbit/2048 kbyte/9192 pages
– 256 bytes per programmable page
– Uniform 4-kbyte Sectors/64-kbyte Blocks
Standard and Dual
– Standard SPI: SCK, CS#, SI, SO, WP#, HOLD#
– Dual SPI: SCK, CS#, SI/IO0, SO, WP#, HOLD#
– Fast Read Dual Output instruction
– Auto-increment Read capability
High Performance
– FAST READ (Serial): 65 MHz clock rate
– DUAL OUTPUT READ: 65 MHz clock rate
Low Power Consumption
– 12 mA typical active current
– 15 µA typical standby current
S25FL216K
16-Mbit 3.0 V Serial Flash Memory
with Uniform 4 kB Sectors
Flexible Architecture with 4 kB Sectors
– Sector Erase (4 kB)
– Block Erase (64 kB)
– Page Program up to 256 bytes
– 100k erase/program cycles typical
– 20-year data retention typical
Software and Hardware Write Protection
– Write Protect all or portion of memory via software
– Enable/Disable protection with WP# pin
High Performance Program/Erase Speed
– Page program time: 1.6 ms typical
– Sector erase time (4 kB): 45 ms typical
– Block erase time (64 kB): 450 ms typical
– Chip erase time: 12 seconds typical
Package Options
– 8-pin SOIC 150/208-mil
– All Pb-free packages are RoHS compliant
General Description
The S25FL216K device is a 16-Mbit, 2048-kbyte Serial Flash memory, with advanced write protection mechanisms. The
S25FL216K supports the standard Serial Peripheral Interface (SPI), and a high performance Dual output using SPI pins: Serial
Clock, Chip Select, Serial SI/IO0, SO, WP#, and HOLD#. SPI clock frequencies of up to 65 MHz are supported.
The S25FL216K array is organized into 8,192 programmable pages of 256 bytes each. Up to 256 bytes can be programmed at a
time. Pages can be erased in groups of 16 (4-kB Sector Erase), groups of 256 (64-kB Block Erase) or the entire chip (Chip Erase).
The S25FL216K has 512 erasable sectors and 32 erasable blocks. The small 4 kB sectors allow for greater flexibility in applications
that require data and parameter storage.
A Hold pin, Write Protect Pin and programmable write protection provide further control flexibility. Additionally, the S25FL216K
device supports JEDEC standard manufacturer and device identification.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-00719 Rev. *J
• San Jose, CA 95134-1709 • 408-943-2600
Revised September 24, 2015
1 page  
S25FL216K
4. Ordering Information
The ordering part number is formed by a valid combination of the following:
S25FL 216 K 0P M F I 01 1
Packing Type
0 = Tray
1 = Tube
3 = 13” Tape and Reel
Model Number (Additional Ordering Options)
04 = 8-pin SO package (150 mil)
01 = 8-pin SO package (208 mil)
Temperature Range
I = Industrial (–40°C to +85°C)
Package Materials
F = Lead (Pb)-free
Package Type
M = 8-pin SO package
Speed
0P = 65 MHz
Device Technology
K = 0.09 µm process technology
Density
216= 16 Mbit
Device Family
S25FL
Spansion Memory 3.0 Volt-Only, Serial Peripheral Interface (SPI) Flash Memory
4.1 Valid Combinations
Table 4.1 lists the valid combinations configurations planned to be supported in volume for this device.
Table 4.1 S25FL216K Valid Combinations
Base Ordering
Part Number
S25FL216K
S25FL216K Valid Combinations
Speed Option
Package and
Temperature
0P MFI
Model
Number
01, 04
Packing Type
0, 1, 3
Package Marking
FL216KIF
Document Number: 002-00719 Rev. *J
Page 6 of 35
5 Page 
S25FL216K
Table 8.1 Command Set (Sheet 2 of 2)
Command
Name
Write Status
Register
Read Data
Fast Read
Byte1 Code
01h
03h
0Bh
Byte2
S7-S0
A23-A16
A23-A16
Byte3
A15-A8
A15-A8
Fast Read
Dual Output
3Bh
A23-A16
A15-A8
Page Program
Block Erase
(64 kB)
Sector Erase
(4 kB)
Chip Erase
Power-down
Release
Power-down /
Device ID
Manufacturer /
Device ID (3)
JEDEC ID
02h
D8h
20h
C7h/60h
B9h
ABh
90h
9Fh
A23-A16
A23-A16
A23-A16
A15-A8
A15-A8
A15-A8
dummy
dummy
dummy
dummy
(M7-M0)
(ID15-ID8)
manufacturer Memory Type
Byte4
A7-A0
A7-A0
A7-A0
A7-A0
A7-A0
A7-A0
dummy
00h
(ID7-ID0)
Capacity
Byte5
Byte6
N-bytes
(D7-D0)
dummy
dummy
(D7-D0)
(Next byte)
continuous
(D7-D0)
(Next byte)
continuous
I/O=
(D6,D4,D2,D0)
O=
(D7,D5,D3,D1)
(One byte per 4
clocks,
continuous)
(Next byte)
Up to 256
bytes
(ID7-ID0) (4)
(M7-M0)
(ID7-ID0)
Notes:
1. Data bytes are shifted with Most Significant Bit first. Byte fields with data in parenthesis “( )” indicate data being read from the device on the SO pin.
2. The Status Register contents will repeat continuously until CS# terminates the instruction.
3. See Table 8.2, Manufacturer and Device Identification on page 12 for Device ID information.
4. The Device ID will repeat continuously until CS# terminates the instruction.
Table 8.2 Manufacturer and Device Identification
OP Code
ABh
90h
9Fh
(M7-M0)
01h
01h
(ID15-ID0)
4015h
(ID7-ID0)
14h
14h
8.1 Write Enable (06h)
The Write Enable command (Figure 8.1) sets the Write Enable Latch (WEL) bit in the Status Register to a 1, which enables the
device to accept a Write Status Register, program, or erase command.
The WEL bit must be set prior to every Page Program, Sector Erase, Block Erase, Chip Erase, and Write Status Register command.
The host system must first drive CS# low, write the WREN command, and then drive CS# high.
Document Number: 002-00719 Rev. *J
Page 12 of 35
11 Page | ||
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| PDF Descargar | [ Datasheet S25FL216K.PDF ] | |
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