NB3N206S PDF даташит
Спецификация NB3N206S изготовлена «ON Semiconductor» и имеет функцию, называемую «3.3 V Differential Multipoint Low Voltage M-LVDS Driver Receiver». |
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Детали детали
Номер произв | NB3N206S |
Описание | 3.3 V Differential Multipoint Low Voltage M-LVDS Driver Receiver |
Производители | ON Semiconductor |
логотип |
19 Pages
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NB3N201S, NB3N206S
3.3 V Differential Multipoint
Low Voltage M-LVDS Driver
Receiver
Description
The NB3N20xS Series are pure 3.3 V supply differential Multipoint
Low Voltage (M−LVDS) line Drivers and Receivers. Devices
NB3N201S and NB3N206S are TIA/EIA−899 compliant. NB3N201S
offers the Type 1 receiver threshold at 0.0 V. NB3N206S offers the
Type 2 receiver threshold at 0.1 V.
These devices have Type−1 and Type−2 receivers that detect the bus
state with as little as 50 mV of differential input voltage over a
common−mode voltage range of −1 V to 3.4 V. The Type−1 receivers
have near zero thresholds (±50 mV) and exhibit 25 mV of differential
input voltage hysteresis to prevent output oscillations with slowly
changing signals or loss of input. Type−2 receivers include an offset
threshold to provide a detectable voltage under open−circuit, idle−bus,
and other faults conditions.
NB3N201S and NB3N206S support Simplex or Half Duplex bus
configurations.
www.onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING
DIAGRAMS
8
NB20x
AYWW
G
1
NB20x
x
A
Y
WW
G or G
= Specific Device Code
= 1, 6
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
Features
• Low−Voltage Differential 30 W to 55 W Line Drivers
and Receivers for Signaling Rates Up to 200 Mbps
• Type−1 Receivers Incorporate 25 mV of Hysteresis
• Type−2 Receivers Provide an Offset (100 mV)
Threshold to Detect Open−Circuit and Idle−Bus
Conditions
• Meets or Exceeds the M−LVDS Standard TIA/EIA−899
for Multipoint Data Interchange
• Controlled Driver Output Voltage Transition Times for
Improved Signal Quality
• −1 V to 3.4 V Common−Mode Voltage Range Allows
Data Transfer With up to 2 V of Ground Noise
• Bus Pins High Impedance When Disabled or VCC ≤
1.5 V
• M−LVDS Bus Power Up/Down Glitch Free
• Operating range: VCC = 3.3 ±10% V( 3.0 to 3.6 V)
• Operation from –40°C to 85°C.
• These are Pb−Free Devices
Applications
• Low−Power High−Speed Short−Reach Alternative to
TIA/EIA−485
• Backplane or Cabled Multipoint Data and Clock
Transmission
• Cellular Base Stations
• Central−Office Switches
• Network Switches and Routers
© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 1
1
Publication Order Number:
NB3N201S/D
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NB3N201S, NB3N206S
Figure 1. Logic Diagram
R1
RE 2
8 VCC
7B
DE 3
6A
D4
5 GND
SOIC−8
NB3N201S, NB3N206S
Figure 2. Pinout Diagram
(Top View)
Table 1. PIN DESCRIPTION
Number Name
I/O Type
1 R LVCMOS Output
2 RE LVCMOS Input
3 DE LVCMOS Input
4 D LVCMOS Input
5 GND
6 A M−LVDS Input
/Output
7 B M−LVDS Input
/Output
8 VCC
Open Default
High
Low
Description
Receiver Output Pin
Receiver Enable Input Pin (LOW = Active, HIGH = High Z
Output)
Driver Enable Input Pin (LOW = High Z Output, HIGH=Active)
Driver Input Pin
Ground Supply pin. Pin must be connected to power supply to
guarantee proper operation.
Transceiver True Input /Output Pin
Transceiver Invert Input /Output Pin
Power Supply pin. Pin must be connected to power supply to
guarantee proper operation.
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NB3N201S, NB3N206S
Table 2. DEVICE FUNCTION TABLE
Inputs
TYPE 1 Receiver
(NB3N201/NB3N203)
VID = VA − VB
VID w 50 mV
−50 mV < VID < 50 mV
VID ≤ −50 mV
X
RE
L
L
L
H
X Open
Open
L
Inputs
TYPE 2 Receiver
(NB3N206/NB3N207)
VID = VA − VB
VID w 150 mV
50 mV < VID < 150 mV
VID ≤ 50 mV
X
RE
L
L
L
H
X Open
Open
L
Input
Enable
D DE
LH
DRIVER
HH
Open
H
X Open
XL
H = High, L = Low, Z = High Impedance, X = Don’t Care, ? = Indeterminate
Output
R
H
?
L
Z
Z
?
Output
R
H
?
L
Z
Z
L
Output
A/Y
L
H
L
Z
Z
B/Z
H
L
H
Z
Z
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NB3N206S | 3.3 V Differential Multipoint Low Voltage M-LVDS Driver Receiver | ON Semiconductor |
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