NB3V60113GV3 PDF даташит
Спецификация NB3V60113GV3 изготовлена «ON Semiconductor» и имеет функцию, называемую «1.8 V 12.288 MHz OmniClock Generator». |
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Детали детали
Номер произв | NB3V60113GV3 |
Описание | 1.8 V 12.288 MHz OmniClock Generator |
Производители | ON Semiconductor |
логотип |
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NB3V60113GV3
1.8 V 12.288 MHz OmniClock
Generator with Single Ended
(LVCMOS) Output
The NB3V60113GV3, which is a member of the OmniClock family,
is a low power PLL−based clock generator. The device accepts a
6.144 MHz single ended (LVCMOS) reference clock as input. It
generates one single ended (LVCMOS) output of 12.288 MHz. The
device can be powered down using the Power Down pin (PD#).
Features
• Member of the OmniClock Family of Programmable Clock
Generators
• Operating Power Supply: 1.8 V ± 0.1 V
• I/O Standards
♦ Input: 6.144 MHz Reference Clock (LVCMOS)
♦ Output: 12.288 MHz (LVCMOS)
• Output Drive Current for Single Ended Output: 8 mA
• Power Saving Mode through Power Down Pin
• Temperature Range −40°C to 85°C
• Packaged in 8−Pin WDFN
• These are Pb−Free Devices
Typical Application
• Audio Systems (Lightning Audio Module)
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WDFN8
CASE 511AT
MARKING DIAGRAM
1
V3MG
G
V3 = Specific Device Code
M = Date Code
G = Pb−Free Device
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
October, 2016 − Rev. 0
1
Publication Order Number:
NB3V60113GV3/D
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NB3V60113GV3
BLOCK DIAGRAM
VDD PD#
XIN/CLKIN
6.144 MHz
XOUT
Crystal/Clock Control
Clock Buffer/
Crystal
Oscillator and
AGC
PLL Block
Phase
Detector
Configuration
Memory
Frequency
and SS
Charge
Pump
VCO
Feedback
Divider
Output control
Output
Divider
CMOS
Buffer
12.288 MHz
NC
NC
GND
Figure 1. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
XIN/CLKIN 1
6.144 MHz
XOUT 2
PD# 3
8 NC
NB3V60113GV3
7 VDD
6 NC
GND 4
5 CLK0
12.288 MHz
Figure 2. Pin Connections (Top View) – WDFN8
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NB3V60113GV3
Table 1. PIN DESCRIPTION
Pin No.
Pin Name Pin Type
1
XIN/CLKIN
Input
2
XOUT
Output
3 PD# Input
4
GND
Ground
5
CLK0
Output
6 NC −
7
VDD
Power
8 NC −
Description
6.144 MHz single−ended external reference input clock (LVCMOS)
Crystal output. Float this pin when external reference clock is connected at XIN
Asynchronous LVCMOS input. Active Low Master Reset to disable the device and set
outputs Low. Internal pull−down resistor. This pin needs to be pulled High for normal op-
eration of the chip.
Power supply ground
12.288 MHz Single−ended (LVCMOS) output
No Connection. Not to be connected to any circuit
1.8 V Power Supply
No Connection. Not to be connected to any circuit
Table 2. POWER DOWN FUNCTION TABLE
PD# Function
0 Device Powered Down
1 Device Powered Up
NOTE: PD# has internal pull down resistor.
Table 3. ATTRIBUTES
Characteristic
ESD Protection Human Body Model
Internal Input Default State Pull up/ down Resistor
Moisture Sensitivity, Indefinite Time Out of Dry Pack (Note 1)
Flammability Rating Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
2 kV
50 kW
MSL1
UL 94 V−0 @ 0.125 in
130 k
Table 4. ABSOLUTE MAXIMUM RATING (Note 2)
Symbol
Parameter
Rating
Unit
VDD
Positive power supply with respect to Ground
−0.5 to +4.6
V
VI
TA
TSTG
TSOL
qJA
Input Voltage with respect to chip ground
Operating Ambient Temperature Range (Industrial Grade)
Storage temperature
Max. Soldering Temperature (10 sec)
Thermal Resistance (Junction−to−ambient)
(Note 3)
0 lfpm
500 lfpm
−0.5 to VDD + 0.5
−40 to +85
−65 to +150
265
129
84
V
°C
°C
°C
°C/W
°C/W
qJC Thermal Resistance (Junction−to−case)
35 to 40
°C/W
TJ Junction temperature
125 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and not valid simultaneously. If
stress limits are exceeded device functional operation is not implied, damage may occur and reliability may be affected.
3. JEDEC standard multilayer board − 2S2P (2 signal, 2 power). ESD51.7 type board. Back side Copper heat spreader area 100 sq mm, 2 oz
(0.070 mm) copper thickness.
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Номер в каталоге | Описание | Производители |
NB3V60113GV3 | 1.8 V 12.288 MHz OmniClock Generator | ON Semiconductor |
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