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CD22202 PDF даташит

Спецификация CD22202 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «5V Low Power DTMF Receiver».

Детали детали

Номер произв CD22202
Описание 5V Low Power DTMF Receiver
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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CD22202 Даташит, Описание, Даташиты
November 2002
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CD22202,
CD22203
5V Low Power DTMF Receiver
Features
Description
• Central Office Quality
• No Front End Band Splitting Filters Required
• Single, Low Tolerance, 5V Supply
• Detects Either 12 or 16 Standard DTMF Digits
• Uses Inexpensive 3.579545MHz Crystal for Reference
• Excellent Speech Immunity
• Output in Either 4-Bit Hexadecimal Code or Binary
Coded 2-of-8
• Synchronous or Handshake Interface
• Three-State Outputs
• Excellent Latch-Up Immunity
Part Number Information
PART
NUMBER
CD22202E
CD22203E
TEMP.
RANGE (oC) PACKAGE
0 to 70 18 Ld PDIP
0 to 70 18 Ld PDIP
PKG. NO.
E18.3
E18.3
The CD22202 and CD22203 complete dual-tone multiple
frequency (DTMF) receivers detect a selectable group of 12
or 16 standard digits. No front-end pre-filtering is needed.
The only externally required components are an inexpensive
3.579545MHz TV “colorburst’’ crystal (for frequency refer-
ence) and a bias resistor. Extremely high system density is
possible through the use of the clock output of a crystal con-
nected CD22202/CD22203 receiver to drive the time bases
of additional receivers. This is a monolithic integrated circuit
fabricated with low-power, complementary symmetry CMOS
processing. It only requires a single low tolerance power
supply.
The CD22202 and CD22203 employ state-of-the-art circuit
technology to combine the digital and analog functions on
the same CMOS chip using a standard digital semiconductor
process. The analog input is preprocessed by 60Hz reject
and band splitting filters and then hard limited to provide
AGC. Eight Bandpass filters detect the individual tones. The
digital post processor times the tone durations and provides
the correctly coded digital outputs. Outputs interface directly
to standard CMOS circuitry and are three-state enabled to
facilitate bus oriented architectures.
Pinout
CD22202, CD22203
(PDIP)
TOP VIEW
D1 1
HEX/B28 2
EN 3
IN1633 4
VDD
ED (203 ONLY),
NC (202)
VSS
5
6
7
XEN 8
ANALOG IN 9
18 D2
17 D4
16 D8
15 CLRDV
14 DV
13 ATB
12 XIN
11 XOUT
10 VSS
Functional Diagram
9
ANALOG IN
13
ATB
8
XEN
XIN
12
11
XOUT
LOW B/P
FILTERS
HIGH B/P
FILTERS
CHIP
CLOCKS
VOLTAGE
REG./REF.
5
VDD
10 7
VSS
6 ED-203
NC-202
15
CLRDV
14
DV
2
HEX/B28
1
D1
18
D2
17
D4
16
D8
3
EN
4
INI633
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
FN1695.4









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CD22202 Даташит, Описание, Даташиты
CD22202, CD22203
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage (VDD)(Referenced to VSS Terminal) . . . . . . . 7V
Power Dissipation
TA = 25oC (Derate above TA = 25oC at 6.25mW/oC . . . . . . . 65mW
Input Voltage Range
All Inputs Except Analog In . . . . . . . . . . . . . . (VDD +0.5V) to -0.5V
Analog in Voltage Range . . . . . . . . . . . . (VDD +0.5V) to (VDD -10V)
DC Current into any Input or Output . . . . . . . . . . . . . . . . . . . . . . ±20mA
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic). . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
NOTE: Unused inputs must be connected to VDD or VSS as appropriate.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications 0oC TA +70oC, VDD = 5V ±10%
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNITS
Frequency Detect Bandwidth
Amplitude for Detection
Each Tone
±(1.5 + 2Hz)
-32
±2.3
-
±3.5
-2
% of fO
dBm Referenced to 600
Minimum Acceptable Twist
Twist = H-L----oi--g-w--h----T-T---o-o--n-n---ee--
-10 - +10 dB
60Hz Tolerance
Dial Tone Tolerance
“Precise” Dial Tone
--
--
Talk Off
MITEL Tape #CM7291
Digital Outputs (except XOUT) “0” Level, 400µA Load
“1” Level, 200µA Load
Digital Inputs
“0” Level
Supply Current
Noise Tolerance
“1” Level
TA = +25oC
MITEL Tape #CM7291
(Note 1)
Input Impedance
VDD VIN (VDD -10)
NOTE:
1. Bandwidth limited (3kHz) Gaussian noise.
-
0
VDD -0.5
0
0.7VDD
-
-
2
-
-
-
-
10
-
100k//15pF 300k
0.8
0
-
0.5
VDD
0.3VDD
VDD
16
-12
-
VRMS
dB Referenced to Lower
Amplitude Tone
Hits
V
V
V
V
mA
dB Referenced to Lowest
Amplitude Tone
2









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CD22202 Даташит, Описание, Даташиты
Functional Block Diagram
CD22202, CD22203
ANALOG
IN
9
ATB 13
XEN 8
1M
12
XIN
XOUT
11
PREPROCESSOR
60Hz
REJECT
PRE EMP
÷8
BAND
SPLIT
FILTERS
BS1
ZERO
CROSSING
DETECTORS
BANDPASS
FILTERS
697
770
852
941
BS2
1209
1336
1477
1633
CLOCK
GENERATOR
CHIP CLOCKS
AMPLITUDE
DETECTORS
TIMING
CIRCUITRY
CD22202
CD22203
EARLY
DETECT
OUTPUT
6
CLRDV
15
DV
STROBE
DATA STROBE
CLR
DV
F.F
DV
14
H/B28
2
1 D1
POWER REGULATOR
5
VDD
10 7
VSS
VSS
VOLTAGE
REF
OUTPUT
DECODER
OUTPUT
REGISTER
DATA CLEAR
IN1633 4
18 D2
17 D4
16 D8
3 EN
NOTE: Pin 6: Early detect output on CD22203 only.
System Functions
Analog In
The Analog In pin accepts the analog input. It is internally
biased so that the input signal may be either AC or DC cou-
pled, as long as it does not exceed the positive supply volt-
age. Proper input coupling is illustrated below.
AUDIO
INPUT
(+4dBm
MAXIMUM)
1500pF
0.01µF
33k
CD22202, CD22203
VDD
270k
9
ANALOG
IN
(ON CHIP)
10pF
>100k
OPTIONAL
HIGH FREQUENCY
NOISE FILTER
(fC = 3.9kHz)
VSS
FIGURE 1. ANALOG IN
The CD22202 and CD22203 are designed to accept sinusoi-
dal input waveforms, but will operate satisfactorily with any
input that has the correct fundamental frequency with har-
monics that are at least 20dB below the fundamental.
Crystal Oscillator
The CD22202 and CD22203 contain an on-board inverter
with sufficient gain to provide oscillation when connected to
a low cost television “color-burst” (3.579545MHz) crystal.
The crystal oscillator is enabled by tying XEN high. The crys-
tal is connected between XIN and XOUT. A 1Mresistor is
also connected between these pins in this mode. ATB is a
clock frequency output. Other CD22202 and CD22203
devices may use the same frequency reference by tying
their ATB pins to the ATB output of a crystal connected
device. XIN and XEN of the auxiliary devices must then be
tied high and low, respectively. Up to ten devices may be run
from a single crystal connected CD22202 and CD22203 as
shown in Figure 2.
3










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