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PDF CD4015BC Data sheet ( Hoja de datos )
| Número de pieza | CD4015BC | |
| Descripción | Dual 4-Bit Static Shift Register | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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October 1987
Revised January 1999
CD4015BC
Dual 4-Bit Static Shift Register
General Description
The CD4015BC contains two identical, 4-stage, serial-
input/parallel-output registers with independent “Data”,
“Clock,” and “Reset” inputs. The logic level present at the
input of each stage is transferred to the output of that stage
at each positive-going clock transition. A logic high on the
“Reset” input resets all four stages covered by that input.
All inputs are protected from static discharge by a series
resistor and diode clamps to VDD and VSS.
Features
s Wide supply voltage range: 3.0V to 18V
s High noise immunity: 0.45 VDD (typ.)
s Low power TTL: Fan out of 2 driving 74L
compatibility: or 1 driving 74LS
s Medium speed operation: 8 MHz (typ.) clock rate
s Fully static design: @VDD − VSS = 10V
Applications
• Serial-input/parallel-output data queueing
• Serial to parallel data conversion
• General purpose register
Ordering Code:
Order Number Package Number
Package Description
CD4015BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
CD4015BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
Pin Assignments for DIP and SOIC
CL
(Note 1)
X
D
0
1
X
X
R Q1 Qn
0 0 Qn−1
0 1 Qn−1
0 Q1 Qn (No change)
100
X = Don't Care Case
Note 1: Level Change
© 1999 Fairchild Semiconductor Corporation DS005948.prf
www.fairchildsemi.com
1 page  
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
Package Number M16A
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet CD4015BC.PDF ] | |
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