8V44S269 PDF даташит
Спецификация 8V44S269 изготовлена «IDT» и имеет функцию, называемую «10-Output Clock Synthesizer». |
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Детали детали
Номер произв | 8V44S269 |
Описание | 10-Output Clock Synthesizer |
Производители | IDT |
логотип |
28 Pages
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FemtoClock® Crystal-to-LVDS, LVCMOS
10-Output Clock Synthesizer
8V44S269
Datasheet
General Description
The 8V44S269 is a ten LVDS/LVTTL output clock synthesizer
designed for instrumentation and wireless applications. The device
generates four copies of a 125MHz, two copies of a 100MHz
differential LVDS clock and one 50MHz (LVCMOS) signal with
excellent phase jitter performance. The PLL is optimized for a
reference frequency of 25MHz. Both a crystal interface and a
single-ended input are supported for the reference frequency. Three
LVCMOS outputs duplicate the reference frequency and are
provided for clock tree cascade purpose. Each of the four LVCMOS
outputs can be supplied with either 3.3V, 2.5V or 1.8V, forming the
respective LVCMOS output levels of 3.3V, 2.5V or 1.8V. The device
uses IDT’s third generation FemtoClock® technology for an optimum
of high clock frequency and low phase noise performance, combined
with a low power consumption. The device supports a 3.3V voltage
supply and is packaged in a small, lead-free (RoHS 6) 48-lead
VFQFN package.
Features
• Third generation FemtoClock® technology
• 125MHz, 100MHz and 50MHz output clocks synthesized from a
25MHz reference clock or fundamental mode crystal
• Six differential LVDS clock outputs
• QA[0:3] outputs (125MHz) are LVDS compatible
• QB[0:1] outputs (100MHz) are LVDS compatible
• Four single-ended LVCMOS-compatible reference clock outputs
• QC output (50MHz) is LVCMOS 3.3V, 2.5V or 1.8V compatible
• QREF[0:2] (25MHz) are LVCMOS 3.3V, 2.5V or 1.8V compatible
• Crystal interface designed for 25MHz XTAL
• RMS phase jitter @ 125MHz, using a 25MHz crystal
(12kHz - 20MHz): 0.57 (typical)
• RMS phase jitter @ 100MHz, using a 25MHz crystal
(12kHz - 20MHz): 0.58 (typical)
• LVCMOS interface levels for the control input
• I/O supply voltages for LVDS:
Core/Output
3.3V/2.5V
• I/O supply voltages for LVCMOS:
Core/Output
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
• Lead-free (RoHS 6) 48-lead VFQFN packaging
• -55°C to 105°C ambient operating temperature
©2016 Integrated Device Technology, Inc.
1
May 9, 2016
No Preview Available ! |
8V44S269 Datasheet
Block Diagram
nOEA[0:3]
BYPASS
Pull-down (4)
Pull-down
4
XTAL_IN
XTAL_OUT
REF_CLK
OSC
25 MHz
Pull-down
fREF = 25 MHz
1
PFD
&
0 LPF
REF_SEL Pull-down
FemtoClock®
VCO
2500MHz
100
1
÷20
÷25
0
125 MHz
÷2
100 MHz
nOEB[0:1]
Pull-down (2)
2
nOEC Pull-down
50 MHz
25 MHz
nOER[0:1]
Pull-down (2)
2
QA0
nQA0
QA1
nQA1
QA2
nQA2
QA3
nQA3
QB0
nQB0
QB1
nQB1
QC
QREF0
QREF1
QREF2
©2016 Integrated Device Technology, Inc.
2
May 9, 2016
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Pin Assignment
8V44S269 Datasheet
REF_CLK
GND
VDDOC
QC
VDDOR2
QREF2
GND
VDDOR1
QREF1
VDDOR0
QREF0
GND
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6 31
7 8V44S269 30
8 29
9 28
10 27
11 26
12 25
13 14 15 16 17 18 19 20 21 22 23 24
GND
QA0
nQA0
QA1
nQA1
VDDOA
QA2
nQA2
QA3
nQA3
GND
nc
Pin Description and Characteristic Tables
Table 1. Pin Descriptions1
Number
Name
Type
Description
1
REF_CLK
Input
Pull-down Single-ended reference clock input. LVCMOS/LVTTL interface levels.
2
GND
Power
Ground power supply (0V).
3
VDDOC
Power
Output supply for the QC output.
4 QC Output
Single-ended clock output. LVCMOS/LVTTL interface levels.
5
VDDOR2
Power
Output supply for the QREF2 output.
6
QREF2
Output
Single-ended clock output (copy 2 of the reference clock).
LVCMOS/LVTTL interface levels.
7
GND
Power
Ground power supply (0V).
8
VDDOR1
Power
Output supply for the QREF1 output.
9
QREF1
Output
Single-ended clock output (copy 1 of the reference clock).
LVCMOS/LVTTL interface levels.
10
VDDOR0
Power
Output supply for the QREF0 output.
11
QREF0
Output
Single-ended clock output (copy 0 of the reference clock).
LVCMOS/LVTTL interface levels.
12
GND
Power
Ground power supply (0V).
©2016 Integrated Device Technology, Inc.
3
May 9, 2016
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