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HI-3587 PDF даташит

Спецификация HI-3587 изготовлена ​​​​«HOLTIC» и имеет функцию, называемую «Transmitter».

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Номер произв HI-3587
Описание Transmitter
Производители HOLTIC
логотип HOLTIC логотип 

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HI-3587 Даташит, Описание, Даташиты
June 2009
HI-3587
ARINC 429
Transmitter with SPI Interface
GENERAL DESCRIPTION
The HI-3587 from Holt Integrated Circuits is a silicon gate
CMOS device for interfacing a Serial Peripheral Interface
(SPI) enabled microcontroller to an ARINC 429 serial bus.
The device provides one ARINC 429 transmitter with 32 X
32 Transmit FIFO and built-in line driver. Transmit FIFO
status can be monitored using the programmable external
interrupt pin, or by polling the HI-3587 Status Register.
Other features include a programmable option of data or
parity in the 32nd bit, and the ability to switch the bit-
signifiance of ARINC 429 labels. Line driver output pins
are available with different values of output resistance to
provide flexibility when using external lightning protection
circuitry.
The Serial Peripheral Interface minimizes the number of
host interface signals and provides a small footprint device
that can be interfaced to a wide variety of industry-
standard microcontrollers supporting SPI. Alternatively,
the SPI signals may be controlled using four general
purpose I/O port pins from a microcontroller or custom
FPGA. The SPI and all control signals are CMOS and TTL
compatible and support 3.3V or 5V operation.
The HI-3587 applies the ARINC 429 protocol to the
transmitter. ARINC 429 databus timing comes from a 1
MHz clock input, or an internal counter can derive it from
higher clock frequencies having certain fixed values,
possibly the external host processor clock.
PIN CONFIGURATIONS (Top View)
N/C - 1
N/C - 2
N/C - 3
N/C - 4
N/C - 5
N/C - 6
MR - 7
SI - 8
CS - 9
N/C - 10
N/C - 11
HI-3587PCI
HI-3587PCT
33 - BOUT27
32 - BOUT37
31 - N/C
30 - V-
29 - N/C
28 - TFLAG
27 - N/C
26 - N/C
25 - N/C
24 - N/C
23 - N/C
44 - Pin Plastic 7mm x 7mm
Chip-Scale Package (QFN)
FEATURES
· ARINC specification 429 compliant
· 3.3V or 5.0V logic supply operation
· On-chip analog line driver connects directly to
ARINC 429 bus
· 32 x 32 Transmit Data FIFO
· Programmable data rate selection
· High-speed, four-wire Serial Peripheral Interface
· Label bit-order control
· 32nd transmit bit can be data or parity
· Low power
· Industrial & extended temperature ranges
N/C - 1
N/C - 2
N/C - 3
N/C - 4
N/C - 5
N/C - 6
MR - 7
SI - 8
CS - 9
N/C - 10
N/C - 11
HI-3587PQI
HI-3587PQT
33 - BOUT27
32 - BOUT37
31 - N/C
30 - V-
29 - N/C
28 - TFLAG
27 - N/C
26 - N/C
25 - N/C
24 - N/C
23 - N/C
44 - Pin Plastic Quad Flat Pack (PQFP)
(DS3587 Rev. D)
HOLT INTEGRATED CIRCUITS
www.holtic.com
06/09









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HI-3587 Даташит, Описание, Даташиты
BLOCK DIAGRAM
ACLK
ARINC
Clock
Divider
SCK
CS
SI
SO
SPI
Interface
Control Register
HI-3587
VDD
ARINC 429
Line Driver
ARINC 429
Transmit
Data FIFO
ARINC 429
Transmit
Formatter
10 Ohm
27 Ohm
27 Ohm
10 Ohm
V+
AOUT37
AOUT27
BOUT27
BOUT37
V-
TFLAG
Status Register
GND
PIN DESCRIPTIONS
SIGNAL
MR
SI
CS
SCK
GND
ACLK
SO
TFLAG
V-
BOUT37
BOUT27
AOUT27
AOUT37
V+
VDD
FUNCTION
INPUT
INPUT
INPUT
INPUT
POWER
INPUT
OUTPUT
OUTPUT
POWER
OUTPUT
OUTPUT
OUTPUT
OUTPUT
POWER
POWER
DESCRIPTION
PULL UP / DOWN
Master Reset. A positive pulse clears the Transmit data FIFO and flags
10K ohm pull-down
SPI interface serial data input
10K ohm pull-down
Chip select. Data is shifted into SI and out of SO when CS is low.
10K ohm pull-up
SPI Clock. Data is shifted into or out of the SPI interface using SCK
10K ohm pull-down
Chip 0V supply
Master timing source for the ARINC 429 transmitter
10K ohm pull-down
SPI interface serial data output
Goes high when ARINC 429 transmit FIFO is empty (CR14=0), or full (CR14=1)
Minus 5V power supply to ARINC 429 Line Driver
ARINC line driver negative output. Direct connection to ARINC 429 bus
Alternate ARINC line driver negative output. Requires external 10 ohm resistor
Alternate ARINC line driver positive output. Requires external 10 ohm resistor
ARINC line driver positive output. Direct connection to ARINC 429 bus
Positive 5V power supply to ARINC 429 Line Driver
3.3V or 5.0V logic power
HOLT INTEGRATED CIRCUITS
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HI-3587 Даташит, Описание, Даташиты
HI-3587
INSTRUCTIONS
Instruction op codes are used to read, write and configure the HI-
3587. When CS goes low, the next 8 clocks at the SCK pin shift
an instruction op code into the decoder, starting with the first
rising SCK edge. The op code is fed into the SI pin, most
significant bit first.
For write instructions, the most significant bit of the data word
must immediately follow the instruction op code and is clocked
into its register on the next rising SCK edge. Data word length
varies depending on word type written: 16-bit writes to Control
Register or 32-bit ARINC word writes to transmit FIFO.
For read instructions, the most significant bit of the requested
data word appears at the SO pin after the last op code bit is
clocked into the decoder, at the next falling SCK edge. As in
write instructions, read instruction data field bit-length varies with
read instruction type.
Table 1 lists all instructions. Instructions that perform a reset or
set, or enable transmission are executed after the last SI bit is
received while CS is still low.
Example:
one SPI Instruction
CS
SCK
SI
op code 07hex
data field 02hex
MSB
LSB MSB
LSB
TABLE 1. DEFINED INSTRUCTION OP CODES
OP CODE
Hex
DATA FIELD
DESCRIPTION
00
None
No instruction implemented
01
None
After the 8th op-code bit is received, perform Master Reset (MR)
02
None
No instruction implemented
03
None
No instruction implemented
04
None
No instruction implemented
05
None
No instruction implemented
06
None
No instruction implemented
07
8 bits
Programs a division of the ACLK input. If the divided ACLK frequency is 1 MHz and Control
Register bit CR1 is set, the ARINC transmitter operates from the divided ACLK clock. Allowable
values for division rate are X1, X2, X4, X8, or XA hex. Any other programmed value results in no
clock. Note: ACLK input frequency and division ratio must result in 1 MHz clock."
08
[Note 1]
Reserved [Note 1]
09
[Note 1]
Reserved [Note 1]
0A
8 bits
Read the Status Register
0B
16 bits
Read the Control Register
0C
8 bits
Read the ACLK divide value programmed previously using op code 07 hex
0D
[Note 1]
Reserved [Note 1]
0E
N x 32 Bits
Write up to 32 words into the next empty position of the Transmitter FIFO
0F
None
No instruction implemented
10
16 bits
Write the Control Register
11
None
Reset the Transmitter FIFO. After the 8th op-code bit is received, the Xmit FIFO will be empty
12
None
Transmission enabled by this instruction only if Control Register bit 13 is zero
Note 1: This instruction is reserved for factory test only. If executed, up to 1,024 data bits may be output from the SO pin.
HOLT INTEGRATED CIRCUITS
3










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