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PDF HI-3185 Data sheet ( Hoja de datos )

Número de pieza HI-3185
Descripción Differential Line Driver
Fabricantes HOLTIC 
Logotipo HOLTIC Logotipo



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No Preview Available ! HI-3185 Hoja de datos, Descripción, Manual

March 2008
HI-3182, HI-3183, HI-3184
HI-3185, HI-3186, HI-3188
ARINC 429 Differential Line Driver
GENERAL DESCRIPTION
The HI-3182, HI-3183, HI-3184, HI-3185, HI-3186 and HI-3188
bus interface products are silicon gate CMOS devices designed
as a line driver in accordance with the ARINC 429 bus specifica-
tions. In addition to being functional upgrades of Holt's HI-8382
& HI-8383 products, they are also alternate sources for the
HS-3182 ( Intersil/Harris), the RM3182 (Fairchild /Raytheon)
and a variety of similar line driver products from other manufac-
turers.
Inputs are provided for clocking and synchronization. These
signals are AND'd with the DATA inputs to enhance system
performance and allow the HI-318X series of products to be
used in a variety of applications. Both logic and synchronization
inputs feature built-in 2,000V minimum ESD input protection as
well as TTL and CMOS compatibility.
The differential outputs of the HI-318X series of products are
programmable to either the high speed or low speed ARINC 429
output rise and fall time specifications through the use of two
external capacitors. The output voltage swing is also adjustable
by the application of an external voltage to the VREF input.
Products with 0, 13 or 37.5 ohm resistors in series with each
ARINC output are available. In addition, the HI-3182 and
HI-3184 products also have a fuse in series with each output.
The HI-318X series of line drivers are intended for use where
logic signals must be converted to ARINC 429 levels such as
when using an ASIC, the HI-3282/HI-8282A ARINC 429 Serial
Transmitter/Dual Receiver, the HI-6010 ARINC 429 Transmit-
ter/Receiver or the HI-8783 ARINC Interface Device. Holt
products are readily available for both industrial and military
applications. Please contact the Holt Sales Department for
additional information.
F E AT U R E S
! Low power CMOS
! TTL and CMOS compatible inputs
! Programmable output voltage swing
! Adjustable ARINC rise and fall times
! Plastic 14 & 16-pin thermally enhanced SOIC
packages available
! Pin-for-Pin alternative for Intersil/Fairchild
applications
! Operates at data rates up to 100 Kbits
! Overvoltage protection
! Industrial and extended temperature ranges
PIN CONFIGURATION (Top View)
VREF 1
GND (See Note * ) 2
SYNC 3
DATA (A) 4
CA 5
AOUT 6
-V 7
14 V1
13 CLOCK
12 DATA (B)
11 CB
10 BOUT
9 +V
8 GND
HI-3184PS, HI-3185PS & HI-3186PS
14 - PIN PLASTIC SMALL OUTLINE (ESOIC)** NB
Notes: * Pin 2 may be left floating
** Thermally Enhanced SOIC Package
(See Page 6 for additional package pin configurations)
FUNCTION
+
_
ARINC 429 DIFFERENTIAL LINE DRIVER
TRUTH TABLE
SYNC CLOCK DATA(A) DATA(B) AOUT BOUT COMMENTS
XL
X
X 0V 0V NULL
LX
X
X 0V 0V NULL
HH
L
L 0V 0V NULL
HH
L
H -VREF +VREF LOW
HH
H
L +VREF -VREF HIGH
HH
H
H 0V 0V NULL
(Ds3182 Rev. K )
HOLT INTEGRATED CIRCUITS
www.holtic.com
03/09

1 page




HI-3185 pdf
HI-3182, HI-3183, HI-3184, HI-3185, HI-3186, HI-3188
HI-318X PACKAGE THERMAL CHARACTERISTICS
PACKAGE STYLE1
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
MAXIMUM ARINC LOAD 3, 6, 7
HEAT SINK
ØJA
(°C/W)
SUPPLY CURRENT2
Unsoldered
82
20 mA
Soldered
65
20 mA
JUNCTION TEMPERATURE, Tj
TA = 25°C TA = 85°C TA = 125°C
57°C
117°C
157°C
51°C
111°C
151°C
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
28-pin Plastic
Unsoldered
Soldered
N/A
51
28
70
20 mA
20 mA
25 mA
45°C
36°C
56°C
105°C
96°C
110°C
145°C
136°C
150°C
PACKAGE STYLE1
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
28-pin Plastic
AOUT and BOUT Shorted to Ground 3, 4, 5, 6, 7
HEAT SINK
ØJA
(°C/W)
JUNCTION TEMPERATURE, Tj
SUPPLY CURRENT2
TA = 25°C TA = 85°C TA = 125°C
Unsoldered
82
36 mA
57°C
147°C
187°C
Soldered
65
36 mA
78°C
138°C
178°C
Unsoldered
Soldered
51
28
40 mA
40 mA
64°C
53°C
124°C
113°C
164°C
153°C
N/A 70
63 mA
100°C
150°C
182°C
Notes:
1. All data taken in still air on devices soldered to a single layer copper PCB (3" X 4.5" X .062").
2. At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8.
3. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF
as this is considered unrealistic for high speed operation.
4. Similar results would be obtained with AOUT shorted to BOUT.
5. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.
6. Data will vary depending on air flow and the method of heat sinking employed.
7. Current values listed are for each of the +V and -V supplies.
HEAT SINK - ESOIC PACKAGES
Both the 14-pin and 16-pin thermally enhanced SOIC dissipation. The heat sink is electrically isolated from the
packages are used for HI-318X products. These ESOIC chip and can be soldered to any ground or power plane.
packages include a metal heat sink located on the bottom However, since the chip’s substrate is at +V, connecting
surface of the device. This heat sink should be soldered the heat sink to this power plane is recommended to avoid
down to the printed circuit board for optimum thermal coupling noise into the circuit.
HOLT INTEGRATED CIRCUITS
5

5 Page





HI-3185 arduino
HI-318X PACKAGE DIMENSIONS
16-PIN CERDIP
.005 min
(.127 min)
.790 max
(20.006 max)
.050 max
(1.27 max)
.288 ±.005
(7.315 ±.125)
inches (millimeters)
Package Type: 16D
.200 max
(5.080 max)
.056 typ
(1.422 typ)
.125 min
(3.175 min)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
.100 BSC
(2.54)
.015 min
(.381 min)
.018 ±.003
(.457 ±.760)
.310 ±.010
(7.874 ±.254)
.180 max
(4.572 max)
0° to 15°
.010 ±.002
(.254 ±.051)
28-PIN PLASTIC PLCC
PIN NO. 1
.045 x 45°
PIN NO. 1 IDENT
.045 x 45°
inches (millimeters)
Package Type: 28J
.050
(1.27)
BSC
.490 ± .005
(12.446 ±.127)
SQ.
.453 ± .003
(11.506 ±.076)
SQ.
.031 ±.005
(.787 ±.127)
See Detail A
.173 ±.008
(4.394 ±.203)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
.410 ±.020
(10.414 ±.508)
.017 ±.004
(.432 ±.102)
.010 ± .001
(.254 ± .03)
.020
(.508)
min
DETAIL A
R
.035
.889
HOLT INTEGRATED CIRCUITS
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