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PDF CD40174BMS Data sheet ( Hoja de datos )

Número de pieza CD40174BMS
Descripción CMOS Hex D-Type Flip-Flop
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! CD40174BMS Hoja de datos, Descripción, Manual

CD40174BMS
December 1992
CMOS Hex ‘D’-Type Flip-Flop
Features
Pinout
• High Voltage Type (20V Rating)
• 5V, 10V and 15V Parametric Ratings
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range, 100nA at 18V and +25oC
• Noise Margin (Over full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard
No. 13A, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
CD40174BMS
TOP VIEW
CLEAR 1
Q1 2
D1 3
D2 4
Q2 5
D3 6
Q3 7
VSS 8
16 VDD
15 Q6
14 D6
13 D5
12 Q5
11 D4
10 Q4
9 CLOCK
Applications
• Shift Registers
• Buffer/Storage Registers
Functional Diagram
D1 3
• Pattern Generators
Description
D2 4
CD40174BMS consists of six identical ‘D’-Type flip-flops
having independent DATA inputs. The CLOCK and CLEAR
inputs are common to all six units. Data is transferred to the
Q outputs on the positive going transition of the clock pulse.
All six flip-flops are simultaneously reset by a low level on the
CLEAR input.
The CD40174BMS is supplied in these 16 lead outline pack-
ages:
Braze Seal DIP H4T
D3 6
D4 11
D5 13
Frit Seal DIP
H1E
Ceramic Flatpack H6W
D5 14
CLOCK 9
CLEAR 1
VSS = 8
VDD = 16
F/F1
F/F2
F/F3
F/F4
F/F5
F/F6
2 Q1
5 Q2
7 Q3
10 Q4
12 Q5
15 Q6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-1384
File Number 3359

1 page




CD40174BMS pdf
Specifications CD40174BMS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
CONDITIONS
Supply Current
IDD VDD = 20V, VIN = VDD or GND
N Threshold Voltage
VNTH VDD = 10V, ISS = -10µA
N Threshold Voltage
Delta
VTN VDD = 10V, ISS = -10µA
P Threshold Voltage
VTP VSS = 0V, IDD = 10µA
P Threshold Voltage
Delta
VTP VSS = 0V, IDD = 10µA
Functional
F VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL VDD = 5V
TPLH
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
NOTES
1, 4
1, 4
1, 4
TEMPERATURE
+25oC
+25oC
+25oC
MIN
-
-2.8
-
1, 4
+25oC
0.2
1, 4
+25oC
-
1
1, 2, 3, 4
+25oC
+25oC
VOH >
VDD/2
-
3. See Table 2 for +25oC limit.
4. Read and Record
MAX
7.5
-0.2
±1
2.8
±1
VOL <
VDD/2
1.35 x
+25oC
Limit
UNITS
µA
V
V
V
V
V
ns
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-1
IDD ± 0.2µA
Output Current (Sink)
IOL5
± 20% x Pre-Test Reading
Output Current (Source)
IOH5A
± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
Group A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
READ AND RECORD
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9 Table 4
7-1388

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