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PDF CD4028BMS Data sheet ( Hoja de datos )
| Número de pieza | CD4028BMS | |
| Descripción | CMOS BCD-To-Decimal Decoder | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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CD4028BMS
December 1992
CMOS BCD-To-Decimal Decoder
Features
Pinout
• High Voltage Type (20V Rating)
• BCD-to-Decimal Decoding or Binary-to-Octal Decoding
CD4028BMS
TOP VIEW
• High Decoded Output Drive Capability
• “Positive Logic” Inputs and Outputs - Decoded Out-
puts Go High On Selection
• Medium-Speed Operation
- tPHL, tPLH = 80ns (typ) at VDD = 10V
• Standardized Symmetrical Output Characteristics
• 100% Tested For Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full
Package-Temperature Range;
- 100nA at 18V and +25oC
41
22
03
74
95
56
67
VSS 8
16 VDD
15 3
14 1
13 B
12 C
11 D
10 A
98
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Code Conversion
• Indication-Tube Decoder
• Address Decoding - Memory Selection Control
Description
Functional Diagram
3-BIT
BINARY
INPUTS
BCD
INPUTS
VDD
16
3
0
10
A
14
1
2
2
13
B
15
3
1
4
12
C
6
5
67
11
D
4
7
9
8
95
8
VSS
BUFFERED
OCTAL
DECODED
OUTPUTS
(1 OF 8)
BUFFERED
DECIMAL
DECODED
OUTPUTS
(1 OF 10)
CD4028BMS types are BCD-to-decimal or binary-to-octal
decoders consisting of buffering on all 4 inputs, decoding
logic gates, and 10 output buffers. A BCD code applied to
the four inputs, A to D, results in a high level at the selected
one of 10 decimal decoded outputs. Similarly, a 3-bit binary
code applied to inputs A through C is decoded in octal code
at output 0 to 7 if D = “0”. High drive capability is provided at
all outputs to enhance dc and dynamic performance in high
fan-out applications.
The CD4028BMS is supplied in these 16-lead outline pack-
ages:
Braze Seal DIP H4S
Frit Seal DIP
H1E
Ceramic Flatpack H3X
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-788
File Number 3303
1 page  
Specifications CD4028BMS
TABLE 6. APPLICABLE SUBGROUPS (Continued)
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
Group A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
Static Burn-In 1
Note 1
OPEN
1 - 7, 9, 14, 15
GROUND
8, 10 - 13
VDD
16
9V ± -0.5V
50kHz
25kHz
Static Burn-In 2 1 - 7, 9, 14, 15
Note 1
8
10 - 13, 16
Dynamic Burn-
In Note 1
-
8
16
1 - 7, 9, 14, 15
10, 12, 13
11
Irradiation
Note 2
1 - 7, 9, 14, 15
8
10 - 13, 16
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
7-792
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet CD4028BMS.PDF ] | |
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