DataSheet26.com

CD4042BMS PDF даташит

Спецификация CD4042BMS изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «CMOS Quad Clocked D Latch».

Детали детали

Номер произв CD4042BMS
Описание CMOS Quad Clocked D Latch
Производители Intersil Corporation
логотип Intersil Corporation логотип 

8 Pages
scroll

No Preview Available !

CD4042BMS Даташит, Описание, Даташиты
CD4042BMS
December 1992
CMOS Quad Clocked “D” Latch
Features
Pinout
• High-Voltage Type (20V Rating)
• Clock Polarity Control
CD4042BMS
TOP VIEW
• Q and Q Outputs
• Common Clock
• Low Power TTL Compatible
Q4 1
Q1 2
Q1 3
16 VDD
15 Q4
14 D4
• Standardized Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• 5V, 10V and 15V Parametric Ratings
D1 4
CLOCK 5
POLARITY 6
D2 7
VSS 8
13 D3
12 Q3
11 Q3
10 Q2
9 Q2
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
NC = NO CONNECTION
Functional Diagram
D1 4
2 Q1
Applications
• Buffer Storage
• Holding Register
• General Digital Logic
Description
CD4042BMS types contain four latch circuits, each strobed by a
common clock. Complementary buffered outputs are available
from each circuit. The impedance of the n- and p- channel output
devices is balanced and all outputs are electrically identical.
D2 7
D3 13
D4 14
CLOCK
5
3 Q1
10 Q2
9 Q2
11 Q3
12 Q3
1 Q4
15 Q4
CL
Information present at the data input is transferred to outputs Q
and Q during the CLOCK level which is programmed by the
POLARITY input. For POLARITY = 0 the transfer occurs during
the 0 CLOCK level and for POLARITY = 1 the transfer occurs
during the 1 CLOCK level. The outputs follow the data input
defined above are present. When a CLOCK transition occurs
(positive for POLARITY = 0 and negative for POLARITY = 1) the
information present at the input during the CLOCK transition is
retained at the outputs until an opposite CLOCK transition
occurs.
POLARITY
6
VDD 16
VSS 8
The CD4042BMS is supplied in these 16 lead outline packages:
Braze Seal DIP H4T
Frit Seal DIP
H1E
Ceramic Flatpack H6W
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-868
File Number 3310









No Preview Available !

CD4042BMS Даташит, Описание, Даташиты
Specifications CD4042BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . .
θja
Ceramic DIP Package . . . . . . . . . . . . . 80oC/W
θjc
20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS (NOTE 1)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
MIN MAX UNITS
Supply Current
IDD VDD = 20V, VIN = VDD or GND
1
+25oC
- 2 µA
2
+125oC
- 200 µA
VDD = 18V, VIN = VDD or GND
3
-55oC
- 2 µA
Input Leakage Current
IIL VIN = VDD or GND VDD = 20
1
+25oC
-100
-
nA
2
+125oC
-1000 -
nA
VDD = 18V
3
-55oC
-100
-
nA
Input Leakage Current
IIH VIN = VDD or GND VDD = 20
1
+25oC
- 100 nA
2
+125oC
- 1000 nA
VDD = 18V
3
-55oC
- 100 nA
Output Voltage
VOL15 VDD = 15V, No Load
1, 2, 3
+25oC, +125oC, -55oC -
50 mV
Output Voltage
VOH15 VDD = 15V, No Load (Note 3)
1, 2, 3
+25oC, +125oC, -55oC 14.95
-
V
Output Current (Sink)
IOL5 VDD = 5V, VOUT = 0.4V
1
+25oC
0.53 - mA
Output Current (Sink)
IOL10 VDD = 10V, VOUT = 0.5V
1
+25oC
1.4 - mA
Output Current (Sink)
IOL15 VDD = 15V, VOUT = 1.5V
1
+25oC
3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V
1
+25oC
- -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V
1
+25oC
- -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V
1
+25oC
- -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V
1
+25oC
- -3.5 mA
N Threshold Voltage
VNTH VDD = 10V, ISS = -10µA
1
+25oC
-2.8 -0.7 V
P Threshold Voltage
VPTH VSS = 0V, IDD = 10µA
1
+25oC
0.7 2.8
V
Functional
F VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
7
7
+25oC
+25oC
VOH > VOL < V
VDD/2 VDD/2
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
Input Voltage Low
(Note 2)
VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC -
1.5 V
Input Voltage High
(Note 2)
VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5
-
V
Input Voltage Low
(Note 2)
VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC -
4V
Input Voltage High
(Note 2)
VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC 11
-
V
NOTES: 1. All voltages referenced to device GND.
2. Go/no go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
7-869









No Preview Available !

CD4042BMS Даташит, Описание, Даташиты
Specifications CD4042BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
(Note 2)
Data in to Q
Propagation Delay
(Note 2)
Data in to Q
Propagation Delay
(Note 2)
Clock to Q
Propagation Delay
(Note 2)
Clock to Q
Transition Time
(Note 2)
SYMBOL CONDITIONS (NOTES 1, 2)
TPHL1 VDD = 5V, VIN = VDD or GND
TPLH1
GROUP A
SUBGROUPS TEMPERATURE
9 +25oC
10, 11
+125oC, -55oC
TPHL2 VDD = 5V, VIN = VDD or GND
TPLH2
9
10, 11
+25oC
+125oC, -55oC
TPHL3 VDD = 5V, VIN = VDD or GND
TPLH3
9
10, 11
+25oC
+125oC, -55oC
TPHL4 VDD = 5V, VIN = VDD or GND
TPLH4
9
10, 11
+25oC
+125oC, -55oC
TTHL VDD = 5V, VIN = VDD or GND
TTLH
9
10, 11
+25oC
+125oC, -55oC
NOTES:
1. VDD = 5V, CL = 50pF, RL = 200K, input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
LIMITS
MIN MAX
- 220
- 297
- 300
- 405
- 450
- 608
- 500
- 675
- 200
- 270
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
SYMBOL
CONDITIONS
IDD VDD = 5V, VIN = VDD or GND
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
Output Voltage
Output Voltage
Output Voltage
Output Voltage
Output Current (Sink)
VOL VDD = 5V, No Load
VOL VDD = 10V, No Load
VOH VDD = 5V, No Load
VOH VDD = 10V, No Load
IOL5 VDD = 5V, VOUT = 0.4V
Output Current (Sink)
IOL10 VDD = 10V, VOUT = 0.5V
Output Current (Sink)
IOL15 VDD = 15V, VOUT = 1.5V
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V
Input Voltage Low
Input Voltage High
VIL VDD = 10V, VOH > 9V, VOL < 1V
VIH VDD = 10V, VOH > 9V, VOL < 1V
NOTES
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
TEMPERATURE
-55oC, +25oC
+125oC
-55oC, +25oC
+125oC
-55oC, +25oC
+125oC
+25oC, +125oC,
-55oC
+25oC, +125oC,
-55oC
+25oC, +125oC,
-55oC
+25oC, +125oC,
-55oC
+125oC
-55oC
+125oC
-55oC
+125oC
-55oC
+125oC
-55oC
+125oC
-55oC
+125oC
-55oC
+125oC
-55oC
+25oC, +125oC,
-55oC
+25oC, +125oC,
-55oC
LIMITS
MIN MAX
-1
- 30
-2
- 60
-2
- 120
- 50
- 50
4.95 -
9.95 -
0.36 -
0.64 -
0.9 -
1.6 -
2.4 -
4.2 -
- -0.36
- -0.64
- -1.15
- -2.0
- -0.9
- -1.6
- -2.4
- -4.2
-3
+7 -
UNITS
µA
µA
µA
µA
µA
µA
mV
mV
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
V
7-870










Скачать PDF:

[ CD4042BMS.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
CD4042BMQuad Clocked D LatchNational Semiconductor
National Semiconductor
CD4042BMSCMOS Quad Clocked D LatchIntersil Corporation
Intersil Corporation

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск