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PDF HI-8571 Data sheet ( Hoja de datos )

Número de pieza HI-8571
Descripción ARINC 429 LINE DRIVER
Fabricantes HOLTIC 
Logotipo HOLTIC Logotipo



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No Preview Available ! HI-8571 Hoja de datos, Descripción, Manual

August 2006
HI-8570, HI-8571
+/- 5V Supply, ARINC 429 LINE DRIVER
DESCRIPTION
The HI-8570 and HI-8571 are CMOS integrated circuits
designed to directly drive the ARINC 429 bus in an 8-pin
package. Two logic inputs control a differential voltage
between the output pins producing a +10 volt One, a
-10 volt Zero, and a 0 volt Null.
A logic input is provided to control the slope of the
differential output signal. Timing is set by an on-chip
resistor and capacitor and tested to be within ARINC
requirements.
The HI-8570 has 37.5 ohms in series with each line driver
output. The HI-8571 provides the option to bypass part of
the output resistance so external resistance may be
added for lightning protection circuits.
The HI-8570 or the HI-8571 along with the HI-8588 line
receiver offer the smallest options available to get on and
off theARINC 429 bus.
www.DataSheet4U.com
FEATURES
! Direct ARINC 429 line driver interface
in a small package
! On-chip line driver slope control and
selection by logic input
! Low current 5 volt supplies
! CMOS / TTL logic pins
! Plastic and ceramic package options -
surface mount and DIP
! Thermally enhanced SOIC packages
! Mil processing available
PIN CONFIGURATION
SLP1.5 1
TX0IN 2
TX1IN 3
GND 4
8 V+
7 TXBOUT
6 TXAOUT
5 V-
SUPPLY VOLTAGES
V+ = +5V
V- = -5V
FUNCTION TABLE
TX1IN TX0IN SLP1.5
00
X
01
0
01
1
10
0
10
1
11
X
TXAOUT
0V
-5V
-5V
5V
5V
0V
TXBOUT
0V
5V
5V
-5V
-5V
0V
SLOPE
N/A
10ms
1.5ms
10ms
1.5ms
N/A
PIN DESCRIPTION TABLE
PIN SYMBOL
1 SLP 1.5
2 TX0IN
3 TX1IN
4 GND
5 V-
6 TXAOUT
7 TXBOUT
8 V+
FUNCTION
LOGIC INPUT
LOGIC INPUT
LOGIC INPUT
POWER
POWER
OUTPUT
OUTPUT
POWER
DESCRIPTION
CMOS OR TTL, V+ IS OK
CMOS OR TTL
CMOS OR TTL
GROUND
-5 VOLTS
LINE DRIVER TERMINAL A
LINE DRIVER TERMINAL B
+5 VOLTS
(DS8570 Rev. B)
HOLT INTEGRATED CIRCUITS
www.holtic.com
08/06

1 page




HI-8571 pdf
HI-8570, HI-8571
PACKAGE THERMAL CHARACTERISTICS
PACKAGE STYLE1
8 Lead Plastic ESOIC5
Maximum ARINC Load
ARINC 429 SUPPLY CURRENT (mA)2
DATA RATE Ta = 25°C Ta = 85°C Ta = 125°C
Low Speed3
20.98
20.96
20.96
High Speed4
26.40
26.16
25.96
JUNCTION TEMP, Tj °C
Ta = 25°C Ta = 85°C Ta = 125°C
38.24
98.34 138.92
44.78 104.66 144.59
PACKAGE STYLE1
8 Lead Plastic ESOIC5
TXAOUT and TXBOUT Shorted to Ground 6,7,8
ARINC 429 SUPPLY CURRENT (mA)2 JUNCTION TEMP, Tj °C
DATA RATE Ta = 25°C Ta = 85°C Ta = 125°C Ta = 25°C Ta = 85°C Ta = 125°C
Low Speed3
High Speed4
30.26
30.44
29.22
29.42
28.46
28.68
53.75
53.92
112.76
112.95
152.04
152.25
Notes:
1. All data taken in still air.
2. At 100% duty cycle, 5V power supplies.
3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF.
4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF
as this is considered unrealistic for high speed operation.
5. 8 Lead Plastic ESOIC (Thermally enhanced SOIC with built in heat sink). Heat sink not soldered.
6. Similar results would be obtained with TXAOUT shorted to TXBOUT.
7. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.
8. Data will vary depending on air flow and the method of heat sinking employed.
HEAT SINK - ESOIC PACKAGES
An 8-pin thermally enhanced SOIC package is used for the
HI-8570/HI-8571 products. The ESOIC package includes
a metal heat sink located on the bottom surface of the
device. This heat sink should be soldered down to the
printed circuit board for optimum thermal dissipation. The
heat sink is electrically isolated from the chip and can be
soldered to any ground or power plane. However, since
the chip’s substrate is at V+, connecting the heat sink to
this power plane is recommended to avoid coupling noise
into the circuit.
HOLT INTEGRATED CIRCUITS
5

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