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CD4098BMS PDF даташит

Спецификация CD4098BMS изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «CMOS Dual Monostable Multivibrator».

Детали детали

Номер произв CD4098BMS
Описание CMOS Dual Monostable Multivibrator
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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CD4098BMS Даташит, Описание, Даташиты
CD4098BMS
December 1992
CMOS Dual Monostable Multivibrator
Features
Description
• High Voltage Type (20V Rating)
• Retriggerable/Resettable Capability
• Trigger and Reset Propagation Delays Independent of
RX, CX
• Triggering from Leading or Trailing Edge
• Q and Q Buffered Outputs Available
• Separate Resets
• Wide Range of Output Pulse Widths
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Characteristics
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Pulse Delay and Timing
• Pulse Shaping
Astable Multivibrator
Pinout
CD4098BMS
TOP VIEW
CX1 1
RXCX (1) 2
RESET (1) 3
+TR (1) 4
-TR (1) 5
Q1 6
Q1 7
VSS 8
16 VDD
15 CX2
14 RXCX (2)
13 RESET (2)
12 +TR (2)
11 -TR (2)
10 Q2
9 Q2
CD4098BMS dual monostable multivibrator provides stable
retriggerable/resettable one shot operation for any fixed volt-
age timing application.
An external resistor (RX) and an external capacitor (CX)
control the timing for the circuit. Adjustment of RX and CX
provides a wide range of output pulse widths from the Q and
Q terminals. The time delay from trigger input to output
transition (trigger propagation delay) and the time delay from
reset input to output transition (reset propagation delay) are
independent of RX and CX.
Leading edge triggering (+TR) and trailing edge triggering
(-TR) inputs are provided for triggering from either edge of
an input pulse. An unused +TR input should be tied to VSS.
An unused -TR input should be tied to VDD. A RESET (on
low level) is provided for immediate termination of the output
pulse or to prevent output pulses when power is turned on.
An unused RESET input should be tied to VDD. However, if
an entire section of the CD4098BMS is not used, its RESET
should be tied to VSS. See Table 9.
In normal operation the circuit triggers (extends the output
pulse one period) on the application of each new trigger
pulse. For operation in the non-retriggerable mode, Q is
connected to -TR when leading edge triggering (+TR) is
used or Q is connected to +TR when trailing edge triggering
(-TR) is used.
The time period (T) for this multivibrator can be
approximated by: TX = 1/2RXCX for CX 3 0.01µF. Time
periods as a function of RX for values of CX and VDD are
given in Figure 8. Values of T vary from unit to unit and as a
function of voltage, temperature, and RXCX.
The minimum value of external resistance, RX, is 5k. The
maximum value of external capacitance, CX, is 100µF.
Figure 9 shows time periods as a function of CX for values of
RX and VDD.
The output pulse width has variations of ±2.5% typically, over
the temperature range of -55oC to +125oC for CX = 1000pF
and RX = 100k.
For power supply variations of ±5%, the output pulse width
has variations of ±0.5% typically, for VDD = 10V and 15V
and ±1% typically, for VDD = 5V at CX = 1000pF and
RX = 5k.
The CD4098BMS is supplied in these 16-lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4T
H1F
H6W
TERMINALS 1, 8, 15 ARE ELECTRICALLY
CONNECTED INTERNALLY
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-482
File Number 3332









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CD4098BMS Даташит, Описание, Даташиты
Functional Diagram
CD4098BMS
+TR
-TR
RESET
4
5
3
CX1
RX1
1 2 RXCX (1)
VDD
MONO 1
6
Q1
7 Q1
+TR
-TR
RESET
12
11
13
MONO 2
10 Q2
9 Q2
VDD = 16
VSS = 8
15 14 RXCX (2)
CX2
RX2
VDD
7-483









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CD4098BMS Даташит, Описание, Даташиты
Specifications CD4098BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . .
θja
Ceramic DIP and FRIT Package . . . . . 80oC/W
θjc
20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS (NOTE 1)
GROUP A
SUBGROUPS TEMPERATURE
LIMITS
MIN MAX UNITS
Supply Current
IDD VDD = 20V, VIN = VDD or GND
1
+25oC
- 2 µA
2
+125oC
- 200 µA
VDD = 18V, VIN = VDD or GND
3
-55oC
- 2 µA
Input Leakage Current
IIL VIN = VDD or GND VDD = 20V
1
+25oC
-100
-
nA
2
+125oC
-1000 -
nA
VDD = 18V
3
-55oC
-100
-
nA
Input Leakage Current
IIH VIN = VDD or GND VDD = 20V
1
+25oC
- 100 nA
2
+125oC
- 1000 nA
VDD = 18V
3
-55oC
- 100 nA
Output Voltage
VOL15 VDD = 15V, No Load
1, 2, 3
+25oC, +125oC, -55oC -
50 mV
Output Voltage
VOH15 VDD = 15V, No Load (Note 3)
1, 2, 3
+25oC, +125oC, -55oC 14.95
-
V
Output Current (Sink)
IOL5 VDD = 5V, VOUT = 0.4V
1
+25oC
0.53 - mA
Output Current (Sink)
IOL10 VDD = 10V, VOUT = 0.5V
1
+25oC
1.4 - mA
Output Current (Sink)
IOL15 VDD = 15V, VOUT = 1.5V
1
+25oC
3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V
1
+25oC
- -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V
1
+25oC
- -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V
1
+25oC
- -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V
1
+25oC
- -3.5 mA
N Threshold Voltage
VNTH VDD = 10V, ISS = -10µA
1
+25oC
-2.8 -0.7 V
P Threshold Voltage
VPTH VSS = 0V, IDD = 10µA
1
+25oC
0.7 2.8
V
Functional
F VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
7
7
+25oC
+25oC
VOH > VOL < V
VDD/2 VDD/2
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
Input Voltage Low
(Note 2)
VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC -
1.5 V
Input Voltage High
(Note 2)
VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5
-
V
Input Voltage Low
(Note 2)
VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC -
4V
Input Voltage High
(Note 2)
VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V
1, 2, 3
+25oC, +125oC, -55oC 11
-
V
NOTES: 1. All voltages referenced to device GND, 100% testing being 3. For accuracy, voltage is measured differentially to VDD. Limit
implemented.
is 0.050V max.
2. Go/No Go test with limits applied to inputs.
7-484










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Номер в каталогеОписаниеПроизводители
CD4098BMSCMOS Dual Monostable MultivibratorIntersil Corporation
Intersil Corporation

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