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PDF AK4645A Data sheet ( Hoja de datos )
| Número de pieza | AK4645A | |
| Descripción | Stereo CODEC | |
| Fabricantes | AKM | |
| Logotipo |  |
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[AK4645A]
AK4645A
Stereo CODEC with MIC/HP-AMP
GENERAL DESCRIPTION
The AK4645A is a stereo CODEC with a built-in Microphone-Amplifier and Headphone-Amplifier. The
AK4645A features analog mixing circuit that allows easy interfacing in mobile phone and portable A/V
player designs. The AK4645A is available in a 32pin QFN (4mm x 4mm), utilizing less board space than
competitive offerings.
FEATURES
1. Recording Function
• 4 Stereo Input Selector
• Stereo Mic Input (Full-differential or Single-ended)
• Stereo Line Input
• MIC Amplifier (+32dB/+26dB/+20dB or 0dB)
• Digital ALC (Automatic Level Control)
(+36dB ∼ −54dB, 0.375dB Step, Mute)
• ADC Performance: S/(N+D): 83dB, DR, S/N: 86dB (MIC-Amp=+20dB)
S/(N+D): 88dB, DR, S/N: 95dB (MIC-Amp=0dB)
• Wind-noise Reduction Filter
• Stereo Separation Emphasis
• Programmable EQ
2. Playback Function
• Digital De-emphasis Filter (tc=50/15(s, fs=32kHz, 44.1kHz, 48kHz)
• Bass Boost
• Soft Mute
• Digital Volume (+12dB ( (115.0dB, 0.5dB Step, Mute)
• Digital ALC (Automatic Level Control)
(+36dB ∼ −54dB, 0.375dB Step, Mute)
• Stereo Separation Emphasis
• Programmable EQ
• Stereo Line Output
- Performance: S/(N+D): 88dB, S/N: 92dB
• Stereo Headphone-Amp
- S/(N+D): [email protected], S/N: 90dB
- Output Power: 70mW@16Ω (HVDD=5V), 62mW@16Ω (HVDD=3.3V)
- Pop Noise Free at Power ON/OFF
• Analog Mixing: 4 Stereo Input
3. Power Management
4. Master Clock:
External Clock Mode
• Frequencies: 256fs, 384fs, 512fs or 1024fs (MCKI pin)
5. Sampling Rate:
• EXT Master/Slave Mode:
7.35kHz ∼ 48kHz (256fs), 7.35kHz ∼ 48kHz (384fs),
7.35kHz ∼ 26kHz (512fs), 7.35kHz ∼ 13kHz (1024fs)
6. μP I/F: 3-wire serial, I2C Bus (Ver 1.0, 400kHz Fast-mode)
7. Master/Slave mode
8. Audio Interface Format: MSB First, 2’s complement
• ADC: 16bit MSB justified, I2S, DSP Mode
• DAC: 16bit MSB justified, 16bit LSB justified, 16-24bit I2S, DSP Mode
MS0986-E-00
-1-
2008/07
1 page  
[AK4645A]
PIN/FUNCTION
No. Pin Name
I/O
Function
1 MPWR
O MIC Power Supply Pin
2 VCOM
O
Common Voltage Output Pin, 0.45 x AVDD
Bias voltage of ADC inputs and DAC outputs.
3 AVSS
- Analog Ground Pin
4 AVDD
- Analog Power Supply Pin, 2.6 ∼ 3.5V
5 RIN3
I Rch Analog Input 3 Pin (AIN3 bit = “1”)
6 I2C
I
Control Mode Select Pin
“H”: I2C Bus, “L”: 3-wire Serial
7 PDN
I
Power-Down Mode Pin
“H”: Power-up, “L”: Power-down, reset and initializes the control register.
8
CSN
CAD0
I Chip Select Pin (I2C pin = “L”: 3-wire Serial Mode)
I Chip Address 1 Select Pin (I2C pin = “H”: I2C Bus Mode)
9
CCLK
SCL
I Control Data Clock Pin (I2C pin = “L”: 3-wire Serial Mode)
I Control Data Clock Pin (I2C pin = “H”: I2C Bus Mode)
10 CDTI
SDA
I Control Data Input Pin (I2C pin = “L”: 3-wire Serial Mode)
I/O Control Data Input Pin (I2C pin = “H”: I2C Bus Mode)
11 SDTI
I Audio Serial Data Input Pin
12 SDTO
O Audio Serial Data Output Pin
13 LRCK
I/O Input / Output Channel Clock Pin
14 BICK
I/O Audio Serial Data Clock Pin
15 DVDD
- Digital Power Supply Pin, 2.6 ∼ 3.5V
16 TVDD
- Digital I/O Power Supply Pin, 1.6 ∼ 3.5V
17 MCKI
I External Master Clock Input Pin
18 TESTO
O
Test Pin
This pin must be open.
19 HVSS
- Headphone Amp Ground Pin
20 HVDD
- Headphone Amp Power Supply Pin
21 HPR
O Rch Headphone-Amp Output Pin
22 HPL
O Lch Headphone-Amp Output Pin
23 MUTET
O
Mute Time Constant Control Pin
Connected to HVSS pin with a capacitor for mute time constant.
24
RIN4
IN4−
I Rch Analog Input 4 Pin (L4DIF bit = “0”: Single-ended Input)
I Negative Line Input 4 Pin (L4DIF bit = “1”: Full-differential Input)
25
LIN4
IN4+
I Lch Analog Input 4 Pin (L4DIF bit = “0”: Single-ended Input)
I Positive Line Input 4 Pin (L4DIF bit = “1”: Full-differential Input)
26 ROUT
LON
O Rch Stereo Line Output Pin (LODIF bit = “0”: Single-ended Stereo Output)
O Negative Line Output Pin (LODIF bit = “1”: Full-differential Mono Output)
27 LOUT
LOP
O Lch Stereo Line Output Pin (LODIF bit = “0”: Single-ended Stereo Output)
O Positive Line Output Pin (LODIF bit = “1”: Full-differential Mono Output)
28
MIN
LIN3
I Mono Signal Input Pin
I Lch Analog Input 3 Pin
29
RIN2
IN2−
I Rch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
I Microphone Negative Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
30 LIN2
IN2+
I Lch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
I Microphone Positive Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
31
LIN1
IN1−
I Lch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
I Microphone Negative Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
32 RIN1
IN1+
I Rch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
I Microphone Positive Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Note 1. All input pins except analog input pins (MIN/LIN3, LIN1, RIN1, LIN2, RIN2, RIN3, RIN4, LIN4) must not be
left floating.
Note 2. AVDD or AVSS voltage must be input to I2C pin.
MS0986-E-00
-5-
2008/07
5 Page 
[AK4645A]
■ Power Consumption for Each Operation Mode
Condtions: Ta=25°C; AVDD=DVDD=TVDD=HVDD=3.3V; AVSS=HVSS=0V; fs=44.1kHz, External Slave Mode,
BICK=64fs; 1kHz, 0dBFS input; Headphone = No output.
Power Management Bit
Mode
All Power-down
00000 0 0000000000
DAC Æ Lineout
10110 0 0000000000
DAC Æ HP
10010 1 1000000000
LIN2/RIN2 Æ HP
10000 1 1000110000
LIN2/RIN2 Æ ADC 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0
LIN1 (Mono) Æ ADC 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
LIN2/RIN2 Æ ADC
& DAC Æ HP
10011 1 1100000000
0
3.2
2.6
1.9
5.5
3.5
7.1
0000
1.8 0.03 0.2 17.2
1.8 0.03 3.0 24.5
0 0 3.0 16.2
1.6 0.03 0.2 24.2
1.5 0.03 0.2 17.3
2.7 0.03 3.0 42.3
Table 1. Power Consumption for each operation mode (typ)
MS0986-E-00
- 11 -
2008/07
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK4645A.PDF ] | |
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