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PDF HMC544A Data sheet ( Hoja de datos )
| Número de pieza | HMC544A | |
| Descripción | GaAs MMIC T/R SWITCH | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Typical Applications
The HMC544A / 544AE is ideal for:
• Cellular/PCS/3G Infrastructure
• Basestations & Repeaters
• WLAN, WiMAX and WiBro
• Microwave and Fixed Wireless Radios
Functional Diagram
HMC544A / 544AE
GaAs MMIC T/R SWITCH,
DC - 4 GHz
Features
Very Low Insertion Loss: 0.2 dB @ 1.0 GHz
High Input P1dB: +39 dBm
High Input IP3: +60 dBm
Positive Control: 0/+3V to 0/+5V
Compact SOT26 SMT Package
General Description
The HMC544A & HMC544AE are low cost SPDT swit-
ches in 6-lead SOT26 packages for use in transmit-
receive applications which require very low insertion
loss at medium power levels. These devices can
control signals from DC to 4.0 GHz and are especially
suited for 450, 900, 1900, 2300, and 2700 MHz
applications with <0.5 dB insertion loss. This GaAs
PHEMT design provides exceptional linearity
performance of +36 dBm 1dB compression point and
+60 dBm third order intercept at +3 volt bias. RF1
and RF2 are reflective opens when “Off”. On-chip
circuitry allows positive control operation at very low
DC current.
Electrical Specifications, TA = +25° C, Vctl = 0/+3 Vdc, 50 Ohm System
Insertion Loss
Parameter
Isolation
Return Loss
Input Power for 1 dB Compression
0/+5V Control
0/+3V Control
Input Third Order Intercept
(Two-Tone Input Power = +13 dBm Each Tone)
Switching Characteristics
tRISE, tFALL (10/90% RF)
tON, tOFF (50% CTL to 10/90% RF)
Frequency
DC - 1.0 GHz
DC - 2.5 GHz
DC - 3.0 GHz
DC - 4 GHz
DC - 1.0 GHz
DC - 2.5 GHz
DC - 3.0 GHz
DC - 4 GHz
DC - 4 GHz
0.3 - 4.0 GHz
0.3 - 4.0 GHz
DC - 4 GHz
Min.
18
11
9
8
36
33
Typ.
0.25
0.4
0.5
0.7
23
16
14
12
28
39
35
60
30
50
Max.
0.5
0.7
0.8
1.0
Units
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
dBm
ns
ns
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1 page  
v00.1212
Typical Application Circuit
HMC544A / 544AE
GaAs MMIC T/R SWITCH,
DC - 4 GHz
Notes:
1. Set logic gate Vdd = +3V to +5V and use HCT series logic to provide a TTL driver interface.
2. Control inputs A/B can be driven directly with CMOS logic (HC) with Vdd of +3V to +5V applied to the CMOS logic gates.
3. DC Blocking capacitors are required for each RF port as shown. Capacitor value determines lowest frequency of operation.
Pin Descriptions
Pin Number
Function
1, 3, 5
RF2, RF1, RFC
Description
These pins are DC coupled and matched to 50 Ohms.
Blocking capacitors are required.
2
GND
This pin must be connected to RF/DC ground.
4 B See truth and control voltage tables.
6 A See truth and control voltage tables.
Interface Schematic
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5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet HMC544A.PDF ] | |
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