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PDF NJU6573 Data sheet ( Hoja de datos )
| Número de pieza | NJU6573 | |
| Descripción | 16COM x 100SEG 1/16 Duty BITMAP LCD Driver | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de NJU6573 (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
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NJU6573
Preliminary
16COM x 100SEG 1/16 Duty BITMAP LCD Driver
GENERAL DESCRIPTION
The NJU6573 is a 16-common x 100-segment
bitmap LCD driver to display graphics or characters.
It incorporates 16 common driver circuits and 100
segment driver circuits. The NJU6573 can display
a 16 x 100 dots graphic or 2-line by 20-character
(5 x 7 dots per character).
In addition, the NJU6573’s useful functions meet
a wide range of applications.
PACKAGE OUTLINE
FEATURES
NJU6573
LCD driving circuit : 16-common and 100-segment
Bias Ratio
: 1/5 bias
Serial Data Transfer : Shift clock max. 2MHz
Oscillator
: CR oscillation with external resistor and capacitor, or
external oscillation signal input.
Programmable Contrast Control:16-steps Electrical Variable Resister (EVR)
Voltage Tripler and bleeder resistance on-chip.
Operating Voltage
: VDD=2.4~3.6V
C-MOS Technology : Substrate : P
Package
: LQFP144 20.0mm x 20.0mm t=1.7mm(Max)
0.5mm pitch
Ver.2013-01-08
-1-
1 page  
NJU6573
Preliminary
FUNCTION DESCRIPTION
(1) Shift Resister
105 bits resister
(2) Latch Circuit
Data stored in display data register is assigned to the corresponding SEG/port.
(3) Segment Driver
Basing on display data, segment drivers output LCD SEG driving signal.
(4) Common Driver
Common drivers output LCD COM driving signal.
(5) Voltage Booster
NJU6573 with a built-in Voltage Booster. The internal voltage booster generates up to 3xVCI voltage(Input:VCI
Terminal, Output: VDCOUT Terminal). The boost voltage VDCOUT must not exceed 10.0V(VCIx3≤ 10V),
otherwise the voltage stress may case a permanent damage to the LSI. When using the internal LCD power
supply, connect the VDCOUT and the VDCIN.
The VREF voltage is tripled to obtain the VREG voltage.(VREFx3=VREG)
Ver.2013-01-08
-5-
5 Page 
NJU6573
(8) Instructions
The NJU6573 incorporates E.V.R register(high). Instruction code as show below.
Preliminary
Instruction
Electrical Voltage Resistor
Table. Table of Instructions
Explanation
When the CSb terminal rising edge eve one bit is High, Data fetched at
SCL rising edge.
In case of entering less then 2-5bit data valid.
CSb
SCL
SI * * *
**
*: Even only 5 clock can set E.V.R if the last bit is "1".
EVR set
C3 C2 C1 C0 1
Don’t care
Contrast Control instruction which adjusts the contrast of the LCD is executed when the code "1" is
written into EVR and the codes of C3 to C0 are written into 2 to 5bit as shown below.
The contrast of LCD can be adjusted one of 16 voltage-stages by setting this 4-bit register.
See below "how to adjust the Contrast of LCD".
Set the binary code "1,1,1,1" when contrast adjustment is unused.
C3 C2 C1 C0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
VLCD=VREG x 20 / (31.25-0.75 x M)
M: Contrast control resistor = 0-15
VLCD voltage (Spec)
VOUT x 0.640
VOUT x 0.656
VOUT x 0.672
VOUT x 0.690
VOUT x 0.708
VOUT x 0.727
VOUT x 0.748
VOUT x 0.769
VOUT x 0.792
VOUT x 0.816
VOUT x 0.842
VOUT x 0.870
VOUT x 0.899
VOUT x 0.930
VOUT x 0.964
VOUT x 1.000
Ex.) VLCD voltage by
VOUT=8.4V
5.376
5.508
5.647
5.793
5.947
6.109
6.280
6.462
6.653
6.857
7.074
7.304
7.551
7.814
8.096
8.400
Ver.2013-01-08
- 11 -
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet NJU6573.PDF ] | |
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