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PDF NJU6532 Data sheet ( Hoja de datos )
| Número de pieza | NJU6532 | |
| Descripción | LCD Driver | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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1/3, 1/4 Duty LCD Driver
NJU6532
Preliminary
GENERAL DESCRIPTION
NJU6532 is a 1/3 or 1/4 duty segment type LCD driver.
It incorporates 4 common driver circuits and 32 segment driver
circuits. NJU6532 can drive maximum 96(84)* segments in
1/3 duty ratio and maximum 128(112)* segments in 1/4 duty
ratio.
Be addition, the NJU6532's useful functions and small
package meet a wide range of applications.
PACKAGE OUTLINE
NJU6532FR3 NJU6532V
FEATURES
LCD driving circuit
:Max. 32outputs (SSOP44: Max. 28outputs) (4 outputs as for general purpose ports)
Programmable Duty Ratio
1/3 duty ratio
:Driving max. 96 segments (SSOP44:Driving max. 84 segments)
1/4 duty ratio
:Driving max. 128 segments (SSOP44:Driving max. 112 segments)
Programmable Bias Ratio :1/2, 1/3 bias ratio
Serial Data Transfer
:Shift clock max. 2MHz
Built-in Oscillator
:CR oscillation with external resistor, or external oscillation signal input
Display OFF
:INHb terminal
Operating Voltage
:2.7 to 5.5V
LCD Driving Voltage
:Vdd to 8.0V
C-MOS Technology
:P-Sub
Package Outline
:SSOP44, LQFP48-R3
BLOCK DIAGRAM
Excluding SSOP44
COM1 COM4 SEG1
SEG24 SEG25 SEG28 SEG29
SEG32/P4
VDD
VLCD
V1
V2
VSS
INHb
COM
Drivers
Segment Drivers /General Purpose Output Ports
Data Latch Circuit
OSC1
OSC2
CSb
SCK
SI
RSTb
Oscillator
Decoder
Display Data Register
Command Register
Ver.2013-01-22
-1-
1 page  
NJU6532
Preliminary
(3) Command Register
Command Register is used to set the duty ratio, the bias ratio, and the SEG driver/general purpose ports. When the D0
to D2 bits of the 1st word are (1,0,0), the D3 ~ D7 bits are recognized as command data.
The contents of Command Register will be initialized as following when applying input signal to Reset terminal.
The Default Value of Command Register
• Duty ratio
: 1/4
• Bias ratio
: 1/3
• SEG driver/General purpose ports : SEG drivers(SEG32, SEG31, SEG30, SEG29)
D0 D1 D2 D3 D4 D5 D6 D7
1 0 0 DS BS TSEL2 TSEL1 TSEL0
Flag bits
Duty ratio Bias ratio
SEG driver or general purpose ports
• Duty Ratio
DS Duty ratio
0 1/4
1 1/3
*) Do not change the duty ratio during display ON.
• Bias ratio
BS
0
1
Bias ratio
1/3
1/2
• SEG driver or general purpose ports
TSEL2 TSEL1 TSEL0 SEG29/P1 SEG30/P2 SEG31/P3 SEG32/P4
0 0 0 SEG29 SEG30 SEG31 SEG32
0 0 1 SEG29 SEG30 SEG31 P4
0 1 0 SEG29 SEG30 P3
P4
0 1 1 SEG29 P2 P3 P4
100
P1
P2
P3
P4
**) If TSEL2 ~ TSEL0 is set to (1, 0, 1), (1, 1, 0), (1, 1, 1) all outputs are used as segment drivers.
Timing of Serial Data Transfer
CSb
SCK
SI 1 0 0 DS BS TSEL2 TSEL1 TSEL0
D0 D1 D2 D3 D4 D5 D6 D7
Flag bits
Ver.2013-01-22
-5-
5 Page 
NJU6532
Preliminary
ELECTRICAL CHARACTERISTICS
• DC characteristics 1
PARAMETER
SYM
BOL
CONDITIONS
(VDD=2.7 to 3.6V, VSS=0V, Ta=-40 to 105°C)
MIN TYP MAX UNIT Note
Power Supply
LCD Driving Voltage
LCD Bias Voltage
VDD
VLCD
V1
V2
VLCD ≥VDD
Ta=25°C
Testing via COM/SEG terminals
COM/SEG without load
2.7 3.6
2.7 8.0
2/3 VLCD-0.2 2/3 VLCD 2/3 VLCD+0.2
1/3 VLCD-0.2 1/3 VLCD 1/3 VLCD+0.2
V
V
V
V
"H" Level Input
Voltage
VIH INHb, CSb, SCK, SI, RESb, OSC1
0.8 VDD
VDD V
"L" Level Input
Voltage
VIL INHb, CSb, SCK, SI, RESb, OSC1
0
0.2 VDD
V
Hysteresis Voltage VH INHb, CSb, SCK, SI, RESb
"H" Level Input
Current
IIH
VIN= VDD
INHb, CSb, SCK, SI, RESb
0.2VDD
V
1.0 µA
"L" Level Input
Current
IIL
VIN= VSS
INHb, CSb, SCK, SI, RESb
1.0 µA
"H" Level Output
Voltage
VOH
VDD =3V, VLCD=5.5V, IO=-5mA,
P1 to P4
VDD-0.6
V
"L" Level Output
Voltage
VOL
VDD =3V, VLCD=5.5V, IO=5mA,
P1 to P4
0.6 V
Driver-on Resistance
(COM)
RCOM
±Id=1µA, VLCD=3V/5.5V
- - 10 kΩ 5
Driver-on Resistance
(SEG)
RSEG
±Id=1µA, VLCD=3V/5.5V
- - 10 kΩ 5
Oscillating Frequency
External Clock
Frequency
fOSC
fCP
VDD =3V, ROSC=1.1MΩ, Ta=25°C
Input into OSC1
6.3 7.9 9.1 kHz
5.13 - 46.2 kHz
External Clock Duty duty Input into OSC1
45 50 55 %
Bleeder Resistor
RB VLCD-VSS Ta=25°C
IDD1
VDD =3V, INHb="L", RSTb="H",
Ta=25°C
127 150 173 kΩ
0.1 1.0 µA
Operating Current
IDD2
ILCD1
VDD =3V, VLCD=5V, Ta=25°C,
Checker flag display, 1/3 bias
Using internal oscillator, no output
VDD=3V, VLCD=5V, RSTb="H",
INHb="L", Ta=25°C
4.0 10 µA
0.1 1.0 µA
ILCD2
VDD =3V, VLCD=5V, Ta=25°C,
Checker flag display, 1/3 bias
Using internal oscillator, no output
34 60 µA
Note-5) Driver-On resistance (RSEG/RCOM) is measured from VLCD, VSS, V1 or V2 terminal to each SEG/COM terminal when Id
current flows through COM/SEG terminals.
Note-6) ["H" Level Input Voltage], ["L" Level Input Voltage], [Hysteresis Voltage], ["H" Level Input Current], ["L" Level
Input Current], [External Clock Frequency] and [External Clock Duty] are as the same as if VDD=4.5 to 5.5V.
Ver.2013-01-22
- 11 -
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet NJU6532.PDF ] | |
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