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CAT25010 PDF даташит

Спецификация CAT25010 изготовлена ​​​​«Catalyst Semiconductor» и имеет функцию, называемую «1K/2K/4K SPI Serial CMOS EEPROM».

Детали детали

Номер произв CAT25010
Описание 1K/2K/4K SPI Serial CMOS EEPROM
Производители Catalyst Semiconductor
логотип Catalyst Semiconductor логотип 

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CAT25010 Даташит, Описание, Даташиты
CAT25010/20/40
1K/2K/4K SPI Serial CMOS EEPROM
FEATURES
s 10 MHz SPI compatible
s 1.8 to 6.0 volt operation
s Hardware and software protection
s Low power CMOS technology
s SPI modes (0,0 & 1,1)*
s Commercial, industrial, automotive and extended
temperature ranges
ALOGEN FR
LEA D F REETM
s 1,000,000 program/erase cycles
s 100 year data retention
s Self-timed write cycle
s 8-Pin DIP/SOIC, 8-Pin TSSOP and 8-Pin MSOP
s 16-byte page write buffer
s Block write protection
– Protect 1/4, 1/2 or all of EEPROM array
DESCRIPTION
The CAT25010/20/40 is a 1K/2K/4K Bit SPI Serial
CMOS EEPROM internally organized as 128x8/256x8/
512x8 bits. Catalyst’s advanced CMOS Technology
substantially reduces device power requirements. The
CAT25010/20/40 features a 16-byte page write buffer.
The device operates via the SPI bus serial interface and
is enabled though a Chip Select (CS). In addition to the
Chip Select, the clock input (SCK), data in (SI) and data
out (SO) are required to access the device. The HOLD
pin may be used to suspend any serial communication
without resetting the serial sequence. The CAT25010/
20/40 is designed with software and hardware write
protection features including Block Write protection. The
device is available in 8-pin DIP, 8-pin SOIC, 8-pin MSOP
and 8-pin TSSOP packages.
PIN CONFIGURATION
SOIC Package (S, V)
CS 1
SO 2
WP
VSS
3
4
8 VCC
7 HOLD
6 SCK
5 SI
MSOP Package (R, Z)*
CS 1
SO 2
WP 3
VSS 4
8 VCC
7 HOLD
6 SCK
5 SI
*CAT 25010/20 only
DIP Package (P, L)
TSSOP Package (U, Y)
CS
SO
WP
VSS
1
2
3
4
8 VCC
7 HOLD
6 SCK
5 SI
CS
SO
WP
VSS
1
2
3
4
8 VCC
7 HOLD
6 SCK
5 SI
PIN FUNCTIONS
Pin Name
Function
SO Serial Data Output
SCK
Serial Clock
WP Write Protect
VCC +1.8V to +6.0V Power Supply
VSS Ground
CS Chip Select
SI Serial Data Input
HOLD
Suspends Serial Input
NC No Connect
BLOCK DIAGRAM
SENSE AMPS
SHIFT REGISTERS
SO
SI
CS
WP
HOLD
SCK
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
I/O
CONTROL
SPI
CONTROL
LOGIC
BLOCK
PROTECT
LOGIC
STATUS
REGISTER
XDEC
E2PROM
ARRAY
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
25C128 F02
* Other SPI modes available on request.
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1006, Rev. L









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CAT25010 Даташит, Описание, Даташиты
CAT25010/20/40
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................. 55°C to +125°C
Storage Temperature ....................... 65°C to +150°C
Voltage on any Pin with
Respect to VSS(1) .................. 2.0V to +VCC +2.0V
VCC with Respect to VSS ................................ 2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25°C) ................................... 1.0W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current(2) ........................ 100 mA
RELIABILITY CHARACTERISTICS
Symbol
NEND(3)
TDR(3)
VZAP(3)
ILTH(3)(4)
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-Up
Min.
1,000,000
100
2000
100
Max.
*COMMENT
Stresses above those listed under Absolute Maximum
Ratingsmay cause permanent damage to the device.
These are stress ratings only, and functional operation
of the device at these or any other conditions outside of
those listed in the operational sections of this specifica-
tion is not implied. Exposure to any absolute maximum
rating for extended periods may affect device perfor-
mance and reliability.
Units
Cycles/Byte
Years
Volts
mA
Reference Test Method
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
D.C. OPERATING CHARACTERISTICS
VCC = +1.8V to +6.0V, unless otherwise specified.
Symbol
ICC1
ICC2
ISB(6)
ILI
ILO
Parameter
Power Supply Current
(Operating Write)
Power Supply Current
(Operating Read)
Power Supply Current
(Standby)
Input Leakage Current
Output Leakage Current
Min.
Limits
Typ.
Max.
5
3
1
2
3
VIL(5)
VIH(5)
VOL1
VOH1
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
-1
VCC x 0.7
VCC - 0.8
VCC x 0.3
VCC + 0.5
0.4
Units
mA
mA
µA
µA
µA
V
V
V
V
Test Conditions
VCC = 5V @ 5MHz
SO=open; CS=Vss
VCC = 5.5V
FCLK = 5MHz
CS = VCC
VIN = VSS or VCC
VIN = VSS or VCC
VOUT = 0V to VCC,
CS = 0V
2.7VVCC<5.5V
IOL = 3.0mA
IOH = -1.6mA
VOL2
VOH2
Output Low Voltage
Output High Voltage
VCC-0.2
0.2 V 1.8VVCC<2.7V
V IOL = 150µA
IOH = -100µA
Note:
(1) The minimum DC input voltage is 0.5V. During transitions, inputs may undershoot to 2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.
(2) Output shorted for no more than one second. No more than one output shorted at a time.
(3) This parameter is tested initially and after a design or process change that affects the parameter.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1V to VCC +1V.
(5) VIL min and VIH max are reference values only and are not tested.
(6) Maximum standby current (ISB ) = 10µA for the Automotive and Extended Automotive temperature range.
Doc. No. 1006, Rev. L
2









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CAT25010 Даташит, Описание, Даташиты
CAT25010/20/40
PIN CAPACITANCE (1)
Applicable over recommended operating range from TA=25˚C, f=1.0 MHz, VCC=+5.0V.
Symbol
Test Conditions
Max.
COUT
CIN
Output Capacitance (SO)
Input Capacitance (CS, SCK, SI, WP, HOLD)
8
6
Units
pF
pF
Conditions
VOUT=0V
VIN=0V
A.C. CHARACTERISTICS
SYMBOL PARAMETER
Limits
1.8V-6.0V 2.5V-6.0V
Min. Max. Min. Max.
4.5V-5.5V
Min. Max.
Test
UNITS Conditions
tSU Data Setup Time
50 20
20
ns VIH = 2.4V
tH Data Hold Time
tWH SCK High Time
tWL SCK Low Time
50 20
250 75
250 75
20
40
40
ns CL = 100pF
ns VOL = 0.8V
ns VOH = 2.0v
fSCK
tLZ
tRI(1)
tFI(1)
tHD
tCD
tWC(3)
tV
Clock Frequency
DC
HOLD to Output Low Z
Input Rise Time
Input Fall Time
HOLD Setup Time
100
HOLD Hold Time
100
Write Cycle Time
Output Valid from Clock Low
1 DC
50
2
2
40
40
5
250
5 DC 10 MHz
50 50 ns
2 2 µs
2 2 µs
40 ns
40 ns CCL L==15000ppFF
5 5 ms (note 2)
75 40 ns
tHO Output Hold Time 0 0 0 ns
tDIS
tHZ
tCS
tCSS
tCSH
tWPS
tWPH
Output Disable Time
HOLD to Output High Z
CS High Time
CS Setup Time
CS Hold Time
WP Setup Time
WP Hold Time
250
150
500 100
500 100
500 100
150 50
150 50
75
50
100
100
100
50
50
75
50
ns
ns
ns
ns
ns
ns
ns
NOTE:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) AC Test Conditions:
Input Pulse Voltages: 0.3VCC to 0.7VCC
Input rise and fall times: 10ns
Input and output reference voltages: 0.5VCC
Output load: current source IOL max/IOH max; CL=50pF
(3) tWC is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle.
3 Doc. No. 1006, Rev. L










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