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PDF CAT522 Data sheet ( Hoja de datos )
| Número de pieza | CAT522 | |
| Descripción | 8-Bit Dual Digital POT With Independent Reference Inputs | |
| Fabricantes | Catalyst Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CAT522 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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Advanced Information
CAT522
8-Bit Dual Digital POT With Independent Reference Inputs
FEATURES
s Buffered Outputs
s Output settings retained without power
s Independent Reference Inputs
s Output range includes both supply rails
s Programming voltage generated on-chip
s 2 independently addressable outputs
s Serial µP interface
s Single supply operation: 2.7V-5.5V
DESCRIPTION
The CAT522 is a dual 8-Bit Memory DAC designed as an
electronic replacement for mechanical potentiometers
and trim pots. Intended for final calibration of products
such as camcorders, fax machines and cellular tele-
phones on automated high volume production lines and
systems capable of self calibration, it is also well suited
for applications were equipment requiring periodic ad-
justment is either difficult to access or located in a
hazardous environment.
The CAT522 offers 2 independently programmable DACs
each having its own reference inputs and each capable
of rail to rail output swing. Outputs are buffered by rail
to rail OP AMPS Output settings, stored in non-volatile
EEPROM memory, are not lost when the device is
powered down and are automatically reinstated when
power is returned. Each output can be dithered to test
new output values without effecting the stored settings
FUNCTIONAL DIAGRAM
VDD
1
RDY/BSY
3
SERIAL DATA OUTPUT
6
DO
PROG
7
PROGRAM
CONTROL
CLK
2
4
CS
DI 5
DATA
CONTROLLER
H.V.
CHARGE
PUMP
EEPROM
LATCH
DAC 1
14 VREF H1
+
–
12 VOUT 1
9 VREF L1
EEPROM
LATCH
DAC 2
13 VREF H2
+
–
11
VOUT 2
10
VREF L2
CAT522
8
GND
APPLICATIONS
s Automated product calibration.
s Remote control adjustment of equipment
s Offset, gain and zero adjustments in Self-
Calibrating and Adaptive Control systems.
s Tamper-proof calibrations.
and stored settings can be read back without disturbing
the DAC’s output.
Control of the CAT522 is accomplished with a simple 3
wire serial interface. A Chip Select pin allows several
CAT522's to share a common serial interface and com-
munications back to the host controller is via a single
serial data line thanks to the CAT522’s Tri-Stated Data
Output pin. A RDY/BSY output working in concert with
an internal low voltage detector signals proper operation
of EEPROM Erase/Write cycle.
The CAT522 operates from a single 3–5 volt power
supply. The high voltage required for EEPROM Erase/
Write operations is generated on-chip.
The CAT522 is available in the 0°C to 70°C Commercial
and –40°C to +85°C Industrial operating temperature
ranges and offered in 14-pin plastic DIP and Surface
mount packages.
PIN CONFIGURATION
DIP Package (P)
SOIC Package (J)
VDD
CLK
RDY/BSY
CS
DI
DO
PROG
1 14
2 13
3 12
4 11
CAT522
5 10
69
78
VREF H1
VREF H2
VDD
CLK
VOUT1
RDY/BSY
VOUT2
VREF L2
VREF L1
CS
DI
DO
GND
PROG
1 14
2 13
3 12
4 11
CAT522
5 10
69
78
VREF H1
VREF H2
VOUT1
VOUT2
VREF L2
VREF L1
GND
© 2000 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
1 page  
Advanced Information
PIN DESCRIPTION
Pin Name
Function
1 VDD
Power supply positive
2 CLK
Clock input pin
3 RDY/BSY Ready/Busy output
4 CS
Chip select
5 DI
Serial data input pin
6 DO
Serial data output pin
7 PROG
EEPROM Programming Enable
Input
8 GND
Power supply ground
9 VREFL1
10 VREFL2
11 VOUT2
Minimum DAC 1 output voltage
Minimum DAC 2 output voltage
DAC 2 output
12 VOUT1
13 VREFH2
14 VREFH1
DAC 1 output
Maximum DAC 2 output voltage
Maximum DAC 1 output voltage
CAT522
DAC addressing is as follows:
DAC OUTPUT
VOUT1
VOUT2
A0
0
1
A1
1
1
DEVICE OPERATION
The CAT522 is a dual 8-bit Digital to Analog Converter
(DAC) whose outputs can be programmed to any one of
256 individual voltage steps. Once programmed, these
output settings are retained in non-volatile EEPROM
memory and will not be lost when power is removed from
the chip. Upon power up the DACs return to the settings
stored in EEPROM memory. Each DAC can be written
to and read from independently without effecting the
output voltage during the read or write cycle. Each
output can also be adjusted without altering the stored
output setting, which is useful for testing new output
settings before storing them in memory.
DIGITAL INTERFACE
The CAT522 employs a standard 3 wire serial control
interface consisting of Clock (CLK), Chip Select (CS)
and Data In (DI) inputs. For all operations, address and
data are shifted in LSB first. In addition, all digital data
must be preceded by a logic “1” as a start bit. The DAC
address and data are clocked into the DI pin on the
clock’s rising edge. When sending multiple blocks of
information a minimum of two clock cycles is required
between the last block sent and the next start bit.
Multiple devices may share a common input data line by
selectively activating the CS control of the desired IC.
Data Outputs (DO) can also share a common line
because the DO pin is Tri-Stated and returns to a high
impedance when not in use.
5
CHIP SELECT
Chip Select (CS) enables and disables the CAT522’s
read and write operations. When CS is high data may be
read to or from the chip, and the Data Output (DO) pin is
active. Data loaded into the DAC control registers will
remain in effect until CS goes low. Bringing CS to a logic
low returns all DAC outputs to the settings stored in
EEPROM memory and switches DO to its high imped-
ance Tri-State mode.
Because CS functions like a reset the CS pin has been
desensitized with a 30 ns to 90 ns filter circuit to prevent
noise spikes from causing unwanted resets and the loss
of volatile data.
CLOCK
The CAT522’s clock controls both data flow in and out of
the IC and EEPROM memory cell programming. Serial
data is shifted into the DI pin and out of the DO pin on the
clock’s rising edge. While it is not necessary for the clock
to be running between data transfers, the clock must be
operating in order to write to EEPROM memory, even
though the data being saved may already be resident in
the DAC control register.
No clock is necessary upon system power-up. The
CAT522’s internal power-on reset circuitry loads data
from EEPROM to the DACs without using the external
clock.
8/00
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet CAT522.PDF ] | |
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