SAM9CN12 PDF даташит
Спецификация SAM9CN12 изготовлена «ATMEL Corporation» и имеет функцию, называемую «SMART ARM-based Embedded MPU». |
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Детали детали
Номер произв | SAM9CN12 |
Описание | SMART ARM-based Embedded MPU |
Производители | ATMEL Corporation |
логотип |
30 Pages
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SAM9N12/SAM9CN11/SAM9CN12
Atmel | SMART ARM-based Embedded MPU
DATASHEET
Description
The Atmel® | SMART SAM9N and SAM9CN ARM926EJ-S™-based embedded
MPUs offer the frequently-requested combination of user interface functionality
and high data rate connectivity, with LCD controller, resistive touchscreen,
multiple UARTs, SPI, I2C, full-speed USB Host and Device and SDIO.
These eMPUs support the latest generation of LPDDR/DDR2 and NAND Flash
memory interfaces for program and data storage. An internal 133 MHz multi-layer
bus architecture associated with eight DMA channels and distributed memory—
including a 32-Kbyte SRAM—sustains the high bandwidth required by the
processor and the high-speed peripherals.
The SAM9CN devices offer on-chip hardware accelerators with DMA support that
enable high-speed data encryption and authentication of transferred data or
applications. Supported standards are up to 256-bit AES, and FIPS Publication
180-2 compliant SHA1 and SHA256. A True Random Number Generator is
embedded for key generation and exchange protocols. The devices also feature
fuse bits for crypto key (SAM9CN12), user configuration (SAM9N12 and
SAM9CN11) and device configuration (all). The SAM9CN12 includes a secure
Boot ROM; the SAM9N12 and SAM9CN11 include a standard Boot ROM.
The I/Os support 1.8V or 3.3V operation and are independently configurable for
the memory interface and peripheral I/Os. This feature eliminates the need for any
external level shifters, while 0.8mm ball pitch packages lower PCB cost and
complexity.
The SAM9N and SAM9CN power management controllers feature efficient clock
gating and a battery backup section that minimizes power consumption in active
and standby modes. The following table presents the embedded features of each
device.
Device Configuration
Feature
Standard Boot with BSC
Secure Boot
TRNG
AES
SHA
SAM9N12
–
–
–
SAM9CN11
–
SAM9CN12
–
Atmel-11063L-ATARM-SAM9N12-SAM9CN11-SAM9CN12-Datasheet_28-Oct-15
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Features
Core
̶ ARM926EJ-S ARM® Thumb® Processor running up to 400 MHz
̶ 16 Kbytes Data Cache, 16 Kbytes Instruction Cache, Memory Management Unit
Memories
̶ One 128-Kbyte internal ROM embedding standard or secure bootstrap routine
̶ One 32-Kbyte internal SRAM, single-cycle access at system speed
̶ 32-bit External Bus Interface supporting 8-bank DDR2/LPDDR, SDR/LPSDR, Static Memories
̶ MLC/SLC NAND Controller, with up to 24-bit Programmable Multibit Error Correction Code (PMECC)
System running up to 133 MHz
̶ Power-on Reset, Reset Controller, Shutdown Controller, Periodic Interval Timer, Watchdog Timer and Real Time
Clock
̶ Boot Mode Select Option, Remap Command
̶ Internal Low Power 32 kHz RC and Fast 12 MHz RC Oscillators
̶ Selectable 32768 Hz Low-power Oscillator, 16 MHz Oscillator, one PLL for the system and one PLL optimized
for USB
̶ Six 32-bit-layer AHB Bus Matrix
̶ Dual Peripheral Bridge with dedicated programmable clock
̶ One dual port 8-channel DMA Controller
̶ Advanced Interrupt Controller (AIC)
̶ Two Programmable External Clock Signals
Low-power Mode
̶ Shutdown Controller with four 32-bit General-purpose Backup Registers
̶ Clock Generator and Power Management Controller
̶ Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
Peripherals
̶ LCD Controller
̶ USB Device Full Speed with dedicated On-chip Transceiver
̶ USB Host Full Speed with dedicated On-chip Transceiver
̶ One High speed SD card and SDIO Host Controller
̶ Two Master/Slave Serial Peripheral Interfaces (SPI)
̶ Two 3-channel 32-bit Timer/Counters (TC)
̶ One Synchronous Serial Controller (SSC)
̶ One 4-channel 16-bit PWM Controller
̶ Two 2-wire Interfaces (TWI)
̶ Four Universal Synchronous Asynchronous Receiver Transmitters (USART)
̶ Two Universal Asynchronous Receiver Transmitters (UART)
̶ One Debug Unit (DBGU)
̶ One 12-channel 10-bit Analog-to-Digital Converter with up to 5-wire resistive Touchscreen support
Safety
̶ Crystal Failure Detection
̶ Independent Watchdog
̶ Power-on Reset Cells
̶ Register Write Protection
̶ SHA (SHA1 and SHA256) Compliant with FIPS Publication 180-2 (SAM9CN11/SAM9CN12 devices)
2 SAM9N12-SAM9CN11-SAM9CN12 [DATASHEET]
Atmel-11063L-ATARM-SAM9N12-SAM9CN11-SAM9CN12-Datasheet_28-Oct-15
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Cryptography
̶ True Random Number Generator (TRNG) compliant with NIST Special Publication 800-22
̶ AES 256-, 192-, 128-bit Key Algorithm compliant with FIPS Publication 197 (SAM9CN11/SAM9CN12 devices)
̶ 256 Fuse bits for crypto key and 64 Fuse bits for device configuration, including JTAG disable and forced boot
from the on-chip ROM
I/O
̶ Four 32-bit Parallel Input/Output Controllers
̶ 105 Programmable I/O Lines Multiplexed with up to Three Peripheral I/Os
̶ Input Change Interrupt Capability on Each I/O Line, optional Schmitt Trigger input
̶ Individually Programmable Open-drain, Pull-up and Pull-down Resistor, Synchronous Output
Packages
̶ 217-ball BGA, pitch 0.8 mm
̶ 247-ball BGA, pitch 0.5 mm
SAM9N12-SAM9CN11-SAM9CN12 [DATASHEET]
Atmel-11063L-ATARM-SAM9N12-SAM9CN11-SAM9CN12-Datasheet_28-Oct-15
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Номер в каталоге | Описание | Производители |
SAM9CN11 | SMART ARM-based Embedded MPU | ATMEL Corporation |
SAM9CN12 | SMART ARM-based Embedded MPU | ATMEL Corporation |
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DataSheet26.com | 2020 | Контакты | Поиск |