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PDF NT1160 Data sheet ( Hoja de datos )
| Número de pieza | NT1160 | |
| Descripción | Touch the keypad | |
| Fabricantes | nuvoton | |
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NT1160
Nuvoton Touch Key Series
NT1160
Datasheet
The information described in this document is the exclusive intellectual property of
Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.
Nuvoton is providing this document only for reference purposes of NuMicro microcontroller based
system design. Nuvoton assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.
For additional information or questions, please contact: Nuvoton Technology Corporation.
www.nuvoton.com
Mar 12, 2016
Page 1 of 22
Rev 1.00
1 page  
2 FEATURES
Support 16 capacitive touch keys
Support 3 LED driver
Output modes:
LED display
I²C
Water resistant or water-droplet operation
Water-droplet operation without action errors
Key lock function
Resist electromagnetic interference
Resistance to electromagnetic radiation of mobile phones
Multiple touch key output selection
Single touch key/ multi-keys function selectable
Key lock function
Prompt output function selectable
I²C parameter settings
Touch key trigger level for each key
Touch key de-bounce for each key
Auto calibration interval
Operating voltage: 2.4V~5.5V
Operating current: 1.8mA~2.3mA
Operating temperature: -40℃~+85℃
Touch key response time: 51 ms
NT1160
Mar 12, 2016
Page 5 of 22
Rev 1.00
5 Page 
NT1160
After the 2nd byte data transmission is complete, the start signal is needed before sending the next
3rd byte data. The SCL signal will change to logic 0 when 3rd byte data transmission is done. SCL
signal will be released till 4th output data is ready. The first host could send logic 1 on SCL and
monitor SCL changing to logic 1 to receive 1st bit. Note that Master should send a logic 1, NACK
signal, on the 9th clock signal of the 4th byte.
5.3 Continuous-Read
This is a 4-byte data combination when Master continually reads Slave. Figure 5-3 shows that the
first byte as device address and write-status; the second byte as memory address; the third byte as
device address and read-status. From the fourth byte, Slave will keep output data with Master
keeping sending ACK and SCL clock signal. The memory address will be automatically increased.
SDA
SCL
Byte1 Device address Byte2 Memory address
Byte3 Device address
Byte4 Data 1
…...
Byte Data n
Figure 5-3 Continuous-Read Mode
5.4 I2C Circuit
The I2C pins are SDA and SCL with Open-Drain mode which requires pull-high resistor on the I2C
bus.
VDD
SDA
SCL
RUP RUP
SDA SCL
Host
SDA SCL
Nu-Touch
SDA SCL
Other Device
Figure 5-4 I2C Bus Connection
Mar 12, 2016
Page 11 of 22
Rev 1.00
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet NT1160.PDF ] | |
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