|
|
PDF NAU8822 Data sheet ( Hoja de datos )
| Número de pieza | NAU8822 | |
| Descripción | 24-bit Stereo Audio Codec | |
| Fabricantes | nuvoton | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de NAU8822 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
NAU8822
24-bit Stereo Audio Codec with Speaker Driver
Description
The NAU8822 is a low power, high quality CODEC for portable and general purpose audio applications. In
addition to precision 24-bit stereo ADCs and DACs, this device integrates a broad range of additional functions to
simplify implementation of complete audio system solutions. The NAU8822 includes drivers for speaker,
headphone, and differential or stereo line outputs, and integrates preamps for stereo differential microphones,
significantly reducing external component requirements. Also, a fractional PLL is available to accurately generate
any audio sample rate for the CODEC using any commonly available system clock from 8MHz through 33MHz.
Advanced on-chip digital signal processing includes a 5-band equalizer, a 3-D audio enhancer, a mixed-signal
automatic level control for the microphone or line input through the ADC, and a digital limiter/dynamic-range-
compressor (DRC) function for the playback path. Additional digital filtering options are available in the ADC path,
to simplify implementation of specific application requirements such as “wind noise reduction” and speech band
enhancement. The digital audio input/output interface can operate as either a master or a slave.
The NAU8822 operates with analog supply voltages from 2.5V to 3.6V, while the digital core can operate at 1.7V to
conserve power. The loudspeaker BTL output pair and two auxiliary line outputs can operate using a 5V supply to
increase output power capability, enabling the NAU8822 to drive 1 Watt into an external speaker. Internal register
controls enable flexible power saving modes by powering down sub-sections of the chip under software control.
The NAU8822 is specified for operation from -40°C to +85°C, and is available with full automotive AEC-/Q100 &
TS16949 qualification. It is packaged in a cost-effective, space-saving 32-lead QFN package.
Key Features
DAC: 94dB SNR and -84dB THD (“A” weighted)
ADC: 90dB SNR and -80dB THD (“A” weighted)
Integrated BTL speaker driver: 1W into 8Ω
Integrated head-phone driver: 40mW into 16Ω
Integrated programmable microphone amplifier
Integrated line input and line output
On-chip PLL
Integrated DSP with specific functions:
5-band equalizer
3-D audio enhancement
Input automatic level control (ALC/AGC)/limiter
Output dynamic-range-compressor/limiter
Notch filter and high pass filter
Standard audio interfaces: PCM and I2S
Serial control interfaces with read/write capability
Realtime readback of signal level and DSP status
Supports any sample rate from 8kHz to 48kHz
Applications
Personal Media Players
Smartphones
Personal Navigation Devices
Portable Game Players
Camcorders
Digital Still Cameras
Portable TVs
Stereo Bluetooth Headsets
LAUXIN
RAUXIN
LLIN
RLIN
LMICN
LMICP
RMICN
RMICP
Stereo
Microphone
Interface
Microphone
Bias
Input
Mixer
LADC
RADC
ADC Filter
Volume
Control
High Pass &
Notch Filters
DAC Filter
Volume
Control
Limiter
5-band EQ
3D
GPIO
PLL
Digital Audio Interface
I2S PCM
LDAC
RDAC
Serial
Control
Interface
Output
Mixer
Headphones/
Line drivers
AUXOUT2
AUXOUT1
LHP
RHP
BTL Speaker
LSPKOUT
RSPKOUT
NAU8822AYG
NAU8822 Datasheet Rev 3.3
Page 1 of 91
Jan 15, 2016
1 page  
Electrical Characteristics
Conditions: VDDC = 1.8V, VDDA = VDDB = VDDSPK = 3.3V (VDDSPK = 1.5*VDDA when Boost), MCLK = 12.88MHz,
TA = +25°C, 1kHz signal, fs = 48kHz, 24-bit audio data, 64X oversampling rate, unless otherwise stated.
Parameter
Symbol Comments/Conditions Min Typ Max Units
Analog to Digital Converter (ADC)
Full scale input signal 1
VINFS
PGABST = 0dB
PGAGAIN = 0dB
Signal-to-noise ratio
Total harmonic distortion 2
SNR Gain = 0dB, A-weighted
THD+N Input = -3dB FS input
Channel separation
1kHz input signal
Digital to Analog Converter (DAC) driving RHP / LHP with 10kΩ / 50pF load
Full-scale output
Gain paths all at 0dB gain
Signal-to-noise ratio
Total harmonic distortion 2
Channel separation
SNR
THD+N
A-weighted
RL = 10kΩ; full-scale signal
1kHz input signal
Output Mixers
Maximum PGA gain into mixer
Minimum PGA gain into mixer
PGA gain step into mixer
Guaranteed monotonic
Speaker Output (RSPKOUT / LSPKOUT with 8Ω bridge-tied-load)
Full scale output 4
SPKBST = 0
VDDSPK=VDDA
SPKBST = 1
Total harmonic distortion 2
THD+N
VDDSPK=1.5*VDDA
Po = 200mW,
VDDSPK=3.3V
Po = 320mW,
VDDSPK = 3.3V
Po = 860mW,
VDDSPK = 1.5*VDDA
Po = 1000mW,
VDDSPK = 1.5*VDDA
Signal-to-noise ratio
SNR VDDSPK = 3.3V
1.0
0
tbd 90
-80 tbd
103
VDDA / 3.3
88 94
-84 tbd
96
+6
-15
3
VDDA / 3.3
(VDDA / 3.3) * 1.5
-63
-64
-60
-36
91
Vrms
dBV
dB
dB
dB
Vrms
dB
dB
dB
dB
dB
dB
Vrms
Vrms
dB
dB
dB
dB
dB
VDDSPK = 1.5*VDDA
90 dB
Power supply rejection ratio
(50Hz - 22kHz)
PSRR
VDDSPK = 3.3V
VDDSPK = 1.5*VDDA
Analog Outputs (RHP / LHP; RSPKOUT / LSPKOUT)
Maximum programmable gain
Minimum programmable gain
Programmable gain step size
Guaranteed monotonic
Mute attenuation
1kHz full scale signal
81 dB
72 dB
+6 dB
-57 dB
1 dB
85 dB
NAU8822 Datasheet Rev 3.3
Page 5 of 91
Jan. 15, 2016
5 Page 
13 APPENDIX B: COMPANDING TABLES .....................................................................................................69
13.1 µ-Law / A-Law Codes for Zero and Full Scale............................................................................................69
13.2 µ-Law / A-Law Output Codes (Digital mW).................................................................................................69
14 APPENDIX C: DETAILS OF REGISTER OPERATION..............................................................................70
15 APPENDIX D: REGISTER OVERVIEW.......................................................................................................87
16 PACKAGE DIMENSIONS ..............................................................................................................................89
17 ORDERING INFORMATION .........................................................................................................................90
NAU8822 Datasheet Rev 3.3
Page 11 of 91
Jan. 15, 2016
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NAU8822.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| NAU8820 | Low Power 24-Bit Stereo Audio Codec |  Nuvoton Technology |
| NAU8822 | 24-bit Stereo Audio Codec | nuvoton |
| NAU8822A | 24-bit Stereo Audio Codec | Nuvoton Technology |
| NAU8822L | 24-bit Stereo Audio Codec | nuvoton |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |