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HPMX-5001 PDF даташит

Спецификация HPMX-5001 изготовлена ​​​​«Agilent(Hewlett-Packard)» и имеет функцию, называемую «1.5-2.5 GHz Upconverter/ Downconverter».

Детали детали

Номер произв HPMX-5001
Описание 1.5-2.5 GHz Upconverter/ Downconverter
Производители Agilent(Hewlett-Packard)
логотип Agilent(Hewlett-Packard) логотип 

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HPMX-5001 Даташит, Описание, Даташиты
1.5 – 2.5 GHz Upconverter/
Downconverter
Technical Data
HPMX-5001
Features
• 2.7 V Single Supply Voltage
• Low Power Consumption
(60␣ mA in Transmit Mode,
39 mA in Receive Mode
Typical)
• 2 dBm Typical Transmit
Power at 1900 MHz
• Half-Frequency VCO with
Frequency Doubler
• 32/33 Dual-Modulus
Prescaler
• Flexible Chip Biasing,
Including Standby Mode
• TQFP-32 Surface Mount
Package
• Operation to 2.5 GHz
• Use with Companion
HPMX-5002 IF chip
Applications
• DECT, UPCS and ISM Band
Handsets and Basestations
Plastic TQFP-32 Package
H
HPMX-5001
YYWW
XXXX ZZZ
Pin Configuration
32
1
25
24
H
HPMX-5001
YYWW
XXXX ZZZ
8 17
9 16
Functional Block Diagram
RX IF OUT
POWER DOWN
CONTROL
RX RF IN
TX RF OUT
X2
32/33
EXT.
VCO
TANK
RATIO
SELECT
General Description
The HPMX-5001 Upconverter/
Downconverter provides RF
system designers with all of the
necessary features to perform an
RF-to-IF downconversion for a
receive path, as well as an IF-to-
RF upconversion for transmit
mode.
Designed to meet the unique
needs of portable applications,
the HPMX-5001 combines the
qualities of flexible chip biasing,
low power consumption, and true
2.7 V minimum supply voltage
operation to provide superior
performance and battery life. By
incorporating the active elements
of the VCO on-chip, as well as a
32/33 dual-modulus prescaler,
overall system component count
and costs are decreased. The
32-TQFP package insures that
this high level of integration
occupies a small amount of
printed circuit board space.
The HPMX-5001 can be used in
either dual-conversion systems
(with the HPMX-5002 IF
Demodulator/Modulator) or
single-conversion systems. The
HPMX-5001 is manufactured
using Hewlett-Packard’s HP-25
Silicon Bipolar Process with
25␣ GHz f T and 30 GHz fMax.
5965-9105E
TX IF IN
PRESCALER
OUT
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HPMX-5001 Даташит, Описание, Даташиты
HPMX-5001 Absolute Maximum Ratings[1]
Parameter
Min.
Max.
VCC Supply Voltage
Voltage at Any Pin[4]
Power Dissipation[2,3]
-0.2 V
-0.2 V
8V
VCC + 0.2 V
600 mW
RF Input Power
15 dBm
Junction Temperature
+150°C
Storage Temperature
-55°C
+125°C
Thermal Resistance[2]:
θjc = 100°C/W
Notes:
1. Operation of this device in excess of
any of these parameters may cause
permanent damage.
2. TCASE = 25°C.
3. Derate at 10 mW/°C for TCASE > 90°C.
4. Except CMOS logic inputs – see
Summary Characterization Information
table.
HPMX-5001 Guaranteed Electrical Specifications
Unless otherwise noted, all parameters are guaranteed under the following conditions: VCC = 3.0 V. Test
results are based upon use of networks shown in test board schematic diagram (see Figure 28). Typical
values are for VCC = 3.0 V, TA = 25°C.
Symbol
Parameters and Test Conditions
Units Min. Typ. Max.
GC Receive Conversion Gain[1]
Pout Transmitter Power Output
Input[2]
2:1 output VSWR
dB
dBm
12
0
14
2
ICC Device Supply Current
Transmit Mode
Receive Mode
mA
mA
64 80
43 54
Synth Mode mA
15 19
Standby Mode (with DIVMC Set High) µA
1 50
VDIV DIV Single-Ended Swing[3]
VPP 0.7 1
Notes:
1. 50 RF source, 100 MHz < IF < 300 MHz, 1.89 GHz RF. There is a 750 resistor on chip between RXIF and RXIFB (pins 3 and 4). A
matching network from 750 to 50 is used for this measurement. Insertion loss of the matching network is included in the net
conversion gain figure. See Figure 28.
2. Signal injected into P3 in Figure 28 is -12.5 dBm.
3. DIV output AC coupled into a 2 k|| 10 pF load. See test board schematic diagram, Figure 28.
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HPMX-5001 Даташит, Описание, Даташиты
HPMX-5001 Summary Characterization Information
Typical values measured on test board shown in Figure 28 at VCC = 3.0 V, TA = 25°C, RXIF = 110.592 MHz,
TXRF = 1.89 GHz, unless otherwise noted.
Symbol
Parameters and Test Conditions
VIH CMOS Input High Voltage (Can Be Pulled
up as High as VCC + 7 V)[1]
VIL CMOS Input Low Voltage
IIH CMOS Input High Current
IIL CMOS Input Low Current
ts DIVMC Setup Time[2,8]
th DIVMC Hold Time[2,8]
tpd DIV Propagation Delay[2,8]
Mode Switching Time[3]
Receive Mode
Gc Receive Conversion Gain[9]
NF Noise Figure[4]
IIP3
IP1dB
VSWRin
Transmit Mode[6]
Input Third Order Intercept Point
Input 1 dB Gain Compression Point
LO Leakage (2 x fVCO) at IF Port
Input VSWR[5]
PIM3
OP1dB
VSWRout
F3dBIF
Synth Mode
Power Output Level for >35 dB IM3 Suppression[10]
Output 1 dB Gain Compression Point
Output VSWR
LO Suppression (2 x fVCO)
IF 3 dB Bandwidth
Transmitter C/N @ 2 x fVCO + 4 MHz[11]
1LO Frequency Range[7]
Units
V
V
µA
µA
ns
ns
ns
µs
dB
dB
dBm
dBm
dBm
dBm
dBm
dBc
MHz
dBc/Hz
MHz
Typical
VCC- 0.8
VCC- 1.9
<10
>-300
4
0
<7
<1
1.89 GHz 2.45 GHz
14 13.5
10 10
-8 -9
-18 -18
-57 —
1.3:1
1.3:1
0
1.8:1
25
500
+137
-5
0
1.8:1
30
500
+134
750-1200
Notes:
1. All CMOS logic inputs are internally pulled up to logic high level.
2. See Figure 2 for detailed timing diagram.
3. Between any two different biasing modes. This switching time does not include PLL lock-up time.
4. Single sideband noise figure.
5. In modes other than receive, the VSWR may be as high as 10:1.
6. Single-ended 50 RF load, 300 series IF terminations (600 differential), 100 MHz < IF < 300 MHz, 1.89 GHz RF.
7. The LO is followed by a frequency doubler which raises the LO range to 1500-2400 MHz.
8. DIV output AC coupled into a 2 k|| 10 pF load. See test diagram, Figure 28.
9. 50 RF source, 110 MHz < IF < 300 MHz, 1.89 GHz or 2.45 GHz RF. There is a 750 resistor on chip between RXIF and RXIFB
(pins 3 and 4). A matching network from 750 to 50␣ is used for this measurement. Insertion loss of the matching network is
included in the net conversion gain figure.
10. PIM3 is the maximum SSB output power for at least 35 dB IM3 spur suppression.
11. Measured at saturated output power for 1.89 GHz. Measured at -5 dBm SSB output power for 2.45␣ GHz.
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