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PDF HM628128DLP-7UL Data sheet ( Hoja de datos )
| Número de pieza | HM628128DLP-7UL | |
| Descripción | 1 M SRAM (128-kword x 8-bit) | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HM628128D Series
1 M SRAM (128-kword × 8-bit)
ADE-203-996 (Z)
Preliminary, Rev. 0.0
Jan. 20, 1999
Description
The Hitachi HM628128D Series is 1-Mbit static RAM organized 131,072-kword × 8-bit. HM628128D
Series has realized higher density, higher performance and low power consumption by employing Hi-
CMOS process technology. The HM628128D Series offers low power standby power dissipation;
therefore, it is suitable for battery backup systems. It has package variations of standard 32-pin plastic DIP,
standard 32-pin plastic SOP and standard 32-pin plastic TSOPI.
Features
• Single 5 V supply: 5 V ± 10%
• Access time: 55 ns/70 ns (max)
• Power dissipation
Active: 30 mW/MHz (typ)
Standby: 10 µW (typ)
• Completely static memory.
No clock or timing strobe required
• Equal access and cycle times
• Common data input and output
Three state output
• Directly TTL compatible all inputs
• Battery backup operation
2 chip selection for battery backup
1 page  
Operation Table
CS1 CS2 WE OE I/O
H H × × High-Z
L L × × High-Z
L L × × High-Z
L H H L Dout
LHL
H Din
L H L L Din
L H H H High-Z
Note: H: VIH, L: VIL, ×: VIH or VIL
HM628128D Series
Operation
Standby
Standby
Standby
Read
Write
Write
Output disable
Absolute Maximum Ratings
Parameter
Symbol
Power supply voltage relative to VSS
Terminal voltage on any pin relative to VSS
Power dissipation
Storage temperature range
VCC
VT
PT
Tstg
Storage temperature range under bias
Tbias
Notes: 1. VT min: –1.5 V for pulse half-width ≤ 30 ns
2. Maximum voltage is +7.0 V
Value
–0.5 to +7.0
–0.5*1 to VCC + 0.3*2
1.0
–55 to +125
–20 to +85
Unit
V
V
W
°C
°C
DC Operating Conditions
Parameter
Symbol
Min
Supply voltage
Input high voltage
Input low voltage
Ambient temperature range
VCC
VSS
VIH
VIL
Ta
4.5
0
2.2
–0.3
–20
Note: 1. VIL min: –1.5 V for pulse half-width ≤ 30 ns
Typ
5.0
0
—
—
—
Max
5.5
0
VCC + 0.3
0.8
+70
Unit
V
V
V
V
°C
Note
1
5
5 Page 
Write Cycle (2) (OE = VIL)
Address
CS1
CS2
WE
Dout
Din
tAS
tWC
Valid address
tCW
*9
HM628128D Series
tWR
tAW
tWP
tWHZ
tOW
High impedance
tOH
*10
tDW tDH
Valid data
*12
*11
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet HM628128DLP-7UL.PDF ] | |
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