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PDF HM6C5332 Data sheet ( Hoja de datos )
| Número de pieza | HM6C5332 | |
| Descripción | HM6C5332 - 1.2GHz/250MHz Dual Frequency Synthesizer | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HM6C5332 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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PRELIMINARY
HM6C5332
HM6C5332 – 1.2GHz/250MHz Dual Frequency Synthesizer
Features
Full CMOS RF frequency synthesizer
Low Current Consumption
Selectable Powersave Mode
Dual Modulus Prescaler
Selectable Charge Pump High Z State
2.7V to 3.6V Operation
Small Out Line 20 Pin TSSOP Package
24 Pin LGA(Leadless Grid Array) Package
Applications
Portable Wireless Communications
Cordless and Cellular Telephone Systems
Wireless Local Area Networks(WLANs)
Cable TV Tuners(CATV)
Other Wireless Communication Systems
Functional Block Diagram
Description
The HM6C5332 of full CMOS monolithic, dual frequency
synthesizer is to be used as a local oscillator for RF and IF
of a dual conversion transceiver. It is fabricated using
Hyundai’s standard CMOS process.
HM6C5332 contains dual modulus prescalers. A 64/65 or
a 128/129 prescaler can be selected for RF synthesizer
and a 8/9 or 16/17 prescaler can be selected for IF
synthesizer. Using digital phase locked loop technique,
HM6C5332 provides the tuning voltage for voltage
controlled oscillators to generate very stable low noise RF
& IF local oscillator signals. Serial data is transferred into
the HM6C5332 via three wire interface (Data, Enable,
Clock). Supply voltage can range from 2.7 to 3.6 V.
HM6C5332 features very low current consumption; 3.2mA
at 3.0V.
HM6C5332 is available in a 20-pin TSSOP package and
24-pin LGA (Leadless Grid Array) package
!"
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#$%
fIN IF
DO IF
DO RF
fIN RF
1 page  
PRELIMINARY
Functional Description
The simplified block diagram below shows the 22-bit data
register, two 15-bit R Counters and the 15-bit and 18-bit N
Counters (intermediate latches are not shown). The data
stream is clocked (on the rising edge of Clock) into the
DATA input, MSB first. The last two bits are the Control
Bits. The DATA is transferred into the counters as follows:
CONTROL BITS
C1 C2
00
01
10
11
DATA LOCATION
IF R Counter
RF R Counter
IF N Counter
RF N Counter
fIN IF
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#$%
DO IF
DO RF
fIN RF
Programmable Reference Dividers (IF and RF R Counters)
If the Control Bits are 00 or 01 (00 for IF and 01 for RF) data is transferred from the 22bit shift register into a latch which
sets the 15-bit R Counter. Serial data format is shown below.
15-Bit Programmable Reference Divider Ratio (R Counter)
DIVIDE R R R R R R R R R R R R R R R
RATIO 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
3 000000000000011
4 000000000000100
• •••••••••••••••
32767 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
NOTES:
1. Divide ratios less than 3 are prohibited.
2. Divide ratio: 3 to 32767.
3. R1 to R15: These bits select the divide ratio of the programmable reference divider.
4. Data is shifted in MSB first.
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet HM6C5332.PDF ] | |
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