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74ACT18825MTD PDF даташит

Спецификация 74ACT18825MTD изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «18-Bit Buffer/Line Driver with 3-STATE Outputs».

Детали детали

Номер произв 74ACT18825MTD
Описание 18-Bit Buffer/Line Driver with 3-STATE Outputs
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74ACT18825MTD Даташит, Описание, Даташиты
August 1999
Revised October 1999
74ACT18825
18-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT18825 contains eighteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is byte controlled. Each byte
has separate 3-STATE control inputs which can be shorted
together for full 18-bit operation.
Features
s Broadside pinout allows for easy board layout
s Separate control logic for each byte
s Extra data width for wider address/data paths or buses
carrying parity
s Outputs source/sink 24 mA
s TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74ACT18825SSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACT18825MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OEn
I0–I17
O0–O17
Description
Output Enable Input (Active LOW)
Inputs
Outputs
FACT, FACT Quiet Seriesand GTOare trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS0500292
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74ACT18825MTD Даташит, Описание, Даташиты
Functional Description
The ACT18825 contains eighteen non-inverting buffers
with 3-STATE standard outputs. The device is byte con-
trolled with each byte functioning identically, but indepen-
dently of the other. The control pins may be shorted
together to obtain full 8-bit operation. The 3-STATE outputs
are controlled by an Output Enable (OEn) input for each
byte. When OEn is LOW, the outputs are in 2-state mode.
When OEn is HIGH, the outputs are in the high impedance
mode, but this does not interfere with entering new data
into the inputs.
Truth Table
Inputs
Outputs
Byte 1 (0:8) Byte 2 (8:17)
I0–I8 I9–I17 O0–O8 O9–O17
OE1 OE2 OE3 OE4
LL L L HH
H
H
HX L L X L
Z
L
XH L L X H
Z
H
LLH X LX
L
Z
LLX HHX
H
Z
HH H H X X
Z
Z
LL L L L L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = HIGH Impedance
Logic Diagram
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74ACT18825MTD Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC +0.5V
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC +0.5V
DC Output Voltage (VO)
DC Output Source/Sink Current (IO)
DC VCC or Ground Current
Per Output Pin
Storage Temperature
0.5V to +7.0V
20 mA
+20 mA
20 mA
+20 mA
0.5V to VCC + 0.5V
±50 mA
±50 mA
65°C to +150°C
Recommended Operating
Conditions
Supply Voltage (VCC)
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate (Vt)
4.5V to 5.5V
0V to VCC
0V to VCC
40°C to +85°C
125 mV/ns
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACTcircuits outside databook specifications.
DC Electrical Characteristics
Symbol
Parameter
VIH Minimum HIGH
Input Voltage
VIL Maximum LOW
Input Voltage
VOH Minimum HIGH
Output Voltage
VCC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
TA = +25°C
TA = −40°C to +85°C
Typ Guaranteed Limits
1.5 2.0
2.0
1.5 2.0
2.0
1.5 0.8
0.8
1.5 0.8
0.8
4.49 4.4
4.4
5.49
5.4
5.4
VOL Maximum LOW
Output Voltage
4.5 3.86
5.5 4.86
4.5 0.001
0.1
5.5 0.001
0.1
3.76
4.76
0.1
0.1
4.5
5.5
IOZ Maximum 3-STATE
Leakage Current
5.5
IIN
Maximum Input Leakage Current
5.5
ICCT
Maximum ICC/Input
5.5 0.6
ICC Maximum Quiescent Supply Current 5.5
IOLD
IOHD
Minimum Dynamic
Output Current (Note 3)
5.5
Note 2: All outputs loaded; thresholds associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
0.36
0.36
±0.5
± 0.1
8.0
0.44
0.44
±5.0
± 1.0
1.5
80.0
75
75
Units
Conditions
V VOUT = 0.1V
or VCC 0.1V
V VOUT = 0.1V
or VCC 0.1V
V IOUT = −50 µA
VIN = VIL or VIH
V IOH = −24 mA
IOH = −24 mA (Note 2)
V IOUT = 50 µA
VIN = VIL or VIH
V IOL = 24 mA
IOL = 24 mA (Note 2)
µA VI = VIL, VIH
VO = VCC, GND
µA VI = VCC, GND
mA VI = VCC 2.1V
µA VIN = VCC or GND
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
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Номер в каталогеОписаниеПроизводители
74ACT18825MTD18-Bit Buffer/Line Driver with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor

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