74ACTQ00PC PDF даташит
Спецификация 74ACTQ00PC изготовлена «Fairchild Semiconductor» и имеет функцию, называемую «Quiet Series Quad 2-Input NAND Gate». |
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Детали детали
Номер произв | 74ACTQ00PC |
Описание | Quiet Series Quad 2-Input NAND Gate |
Производители | Fairchild Semiconductor |
логотип |
6 Pages
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August 1990
Revised April 1999
74ACTQ00
Quiet Series™ Quad 2-Input NAND Gate
General Description
The ACTQ00 contains four 2-input NAND gates and uti-
lizes Fairchild FACT Quiet Series™ technology to guaran-
tee quiet output switching and improve dynamic threshold
performance FACT Quiet Series features GTO™ output
control and undershoot corrector in addition to a split
ground bus for superior ACMOS performance.
Features
s ICC reduced by 50%
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Improved latch-up immunity
s Outputs source/sink 24 mA
s Has TTL-compatible inputs
Ordering Code:
Order Number
74ACTQ00SC
74ACTQ00PC
Package Number
Package Description
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Assignment for
DIP and SOIC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
FACT™, Quiet Series™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010888.prf
www.fairchildsemi.com
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Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
−0.5V to +7.0V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
±50 mA
±50 mA
−65°C to +150°C
DC Latch-up Source
or Sink Current
Junction Temperature (TJ)
PDIP
±300 mA
140°C
Recommended Operating
Conditions
Supply Voltage (VCC)
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
4.5V to 5.5V
0V to VCC
0V to VCC
−40°C to +85°C
VIN from 0.8V to 2.0V
125 mV/ns
VCC @ 4.5V, 5.5V
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
DC Electrical Characteristics
Symbol
Parameter
VCC
TA = +25°C
TA = −40°C to +85°C Units
(V) Typ
Guaranteed Limits
Conditions
VIH Minimum HIGH Level
Input Voltage
VIL Maximum LOW Level
Input Voltage
VOH Minimum HIGH Level
Output Voltage
4.5 1.5
2.0
2.0
V VOUT = 0.1V
5.5 1.5
2.0
2.0
or VCC − 0.1V
4.5 1.5
0.8
0.8
V VOUT = 0.1V
5.5 1.5
0.8
0.8
or VCC − 0.1V
4.5 4.49
4.4
4.4
V IOUT = −50 µA
5.5 5.49
5.4
5.4
VOL Maximum LOW Level
Output Voltage
4.5 3.86
5.5 4.86
4.5 0.001
0.1
5.5 0.001
0.1
3.76
4.76
0.1
0.1
VIN = VIL or VIH
IOH = −24 mA
V IOH = −24 mA (Note 2)
V IOUT = 50 µA
IIN
ICCT
IOLD
IOHD
ICC
VOLP
VOLV
VIHD
Maximum Input Leakage Current
Maximum ICC/Input
Minimum Dynamic
Output Current (Note 3)
Maximum Quiescent Supply Current
Quiet Output Maximum Dynamic
VOL
Quiet Output Minimum Dynamic
VOL
Minimum HIGH Level Dynamic
Input Voltage
4.5
5.5
5.5
5.5
5.5
5.5
5.5
5.0
5.0
5.0
0.6
1.1
−0.6
1.9
0.36
0.36
±0.1
2.0
1.5
−1.2
2.2
0.44
0.44
±1.0
1.5
75
−75
20.0
VIN = VIL or VIH
IOL = 24 mA
V IOL = 24 mA (Note 2)
µA VI = VCC, GND
mA V I = VCC − 2.1V
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC or GND
V Figure 1, Figure 2
(Note 4)(Note 5)
V Figure 1, Figure 2
(Note 4)(Note 5)
V (Note 4)(Note 6)
VILD
Maximum LOW Level Dynamic
Input Voltage
5.0 1.2
0.8
V (Note 4)(Note 6)
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: DIP package.
Note 5: Max number of outputs defined as (n). Data inputs are 0V to 3V. One output @ GND.
Note 6: Max number of data inputs (n) switching. (n−1) inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD),
0V to threshold (VIHD), f = 1 MHz.
www.fairchildsemi.com
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AC Electrical Characteristics
VCC
TA = +25°C
TA = −40°C to +85°C
Symbol
Parameter
(V) CL = 50 pF
CL = 50 pF
Units
(Note 7)
Min
Typ
Max
Min
Max
tPLH Propagation Delay
Data to Output
5.0 2.0
7.5 2.0 8.0
ns
tPHL Propagation Delay
Data to Output
5.0 2.0
7.5 2.0 8.0
ns
tOSHL
Output to Output
tOSLH
Skew (Note 8)
Note 7: Voltage Range 5.0 is 5.0V ±0.5V.
5.0
0.5 1.0
1.0 ns
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design.
Capacitance
Symbol
CIN
CPD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ Units
Conditions
4.5 pF VCC = OPEN
74 pF VCC = 5.0V
3 www.fairchildsemi.com
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