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74ACTQ16646MTD PDF даташит

Спецификация 74ACTQ16646MTD изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «16-Bit Transceiver/Register with 3-STATE Outputs».

Детали детали

Номер произв 74ACTQ16646MTD
Описание 16-Bit Transceiver/Register with 3-STATE Outputs
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74ACTQ16646MTD Даташит, Описание, Даташиты
June 1991
Revised January 1999
74ACTQ16646
16-Bit Transceiver/Register with 3-STATE Outputs
General Description
The ACTQ16646 contains sixteen non-inverting bidirec-
tional registered bus transceivers providing multiplexed
transmission of data directly from the input bus or from the
internal storage registers. Each byte has separate control
inputs which can be shorted together for full 16-bit opera-
tion. The DIR inputs determine the direction of data flow
through the device. The CPAB and CPBA inputs load data
into the registers on the LOW-to-HIGH transition. The
ACTQ16646 utilizes Fairchild Quiet Seriestechnology to
guarantee quiet output switching and improved dynamic
threshold performance. FACT Quiet Seriesfeatures
GTOoutput control and undershoot corrector for superior
performance.
Features
s Utilizes Fairchild FACT Quiet Series technology
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin output skew
s Independent registers for A and B buses
s Multiplexed real-time and stored data transfers
s Separate control logic for each byte
s 16-bit version of the ACTQ646
s Outputs source/sink 24 mA
s Additional specs for Multiple Output Switching
s Output loading specs for both 50 pF and 250 pF loads
Ordering Code:
Order Number Package Number
Package Description
74ACTQ16646SSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACTQ16646MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Assignment for
SSOP and TSSOP
FACT, Quiet Series, FACT Quiet Seriesand GTOare trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010937.prf
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74ACTQ16646MTD Даташит, Описание, Даташиты
Function Table
Inputs
Data I/O (Note 1)
Output Operation Mode
G1 DIR1 CPAB1 CPBA1 SAB1 SBA1 A0–7 B0–7
H X H or L H or L X X
Isolation
H X
X X X Input Input Clock An Data into A Register
H X X
XX
Clock Bn Data Into B Register
L H X X L X
An to Bn—Real Time (Transparent Mode)
LH
X L X Input Output Clock An Data to A Register
L H H or L X H X
LH
XHX
A Register to Bn (Stored Mode)
Clock An Data into A Register and Output to Bn
L L X X X L
Bn to An—Real Time (Transparent Mode)
LLX
X L Output Input Clock Bn Data into B Register
L L X H or L X H
LLX
XH
B Register to An (Stored Mode)
Clock Bn into B Register and Output to An
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition.
Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled; i.e., data
at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15) and #2 control pins.
Real Time Transfer
A-Bus to B-Bus
Storage from
Bus to Register
Real Time Transfer
B-Bus to A-Bus
Transfer from
Register to Bus
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74ACTQ16646MTD Даташит, Описание, Даташиты
Logic Diagram
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Номер в каталогеОписаниеПроизводители
74ACTQ16646MTD16-Bit Transceiver/Register with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor

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