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74ACTQ18825MTD PDF даташит

Спецификация 74ACTQ18825MTD изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «18-Bit Buffer/Line Driver with 3-STATE Outputs».

Детали детали

Номер произв 74ACTQ18825MTD
Описание 18-Bit Buffer/Line Driver with 3-STATE Outputs
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74ACTQ18825MTD Даташит, Описание, Даташиты
September 1991
Revised January 2000
74ACTQ18825
18-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACTQ18825 contains eighteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is byte controlled. Each byte
has separate 3-STATE control inputs which can be shorted
together for full 18-bit operation.
The ACTQ18825 utilizes Fairchild FACT Quiet Series
technology to guarantee quiet output switching and
improved dynamic threshold performance. FACT Quiet
Series features GTOoutput control and undershoot cor-
rector for superior performance.
Features
s Utilizes Fairchild FACT Quiet Series technology
s Broadside pinout allows for easy board layout
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin output skew
s Separate control logic for each byte
s Extra data width for wider address/data paths or buses
carrying parity
s Outputs source/sink 24 mA
s Additional specs for Multiple Output Switching
s Output loading specs for both 50 pF and 250 pF loads
Ordering Code:
Order Number Package Number
Package Description
74ACTQ18825SSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACTQ18825MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OEn
I0–I17
O0–O17
Description
Output Enable Input (Active LOW)
Inputs
Outputs
FACT, FACT Quiet Seriesand GTOare trademarks of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation DS010955
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74ACTQ18825MTD Даташит, Описание, Даташиты
Connection Diagram
Logic Diagram
Functional Description
The ACTQ18825 contains eighteen non-inverting buffers
with 3-STATE standard outputs. The device is byte con-
trolled with each byte functioning identically, but indepen-
dently of the other. The control pins may be shorted
together to obtain full 18-bit operation. The 3-STATE out-
puts are controlled by an Output Enable (OEn) input for
each byte. When OEn is LOW, the outputs are in 2-state
mode. When OEn is HIGH, the outputs are in the high
impedance mode, but this does not interfere with entering
new data into the inputs.
Truth Table
Inputs
Outputs
Byte 1 (0:8) Byte 2 (8:17) I0–I8 I9–I17 O0–O8 O9–O17
OE1 OE2 OE3 OE4
LL L
L HH
H
H
HX L L X L
Z
L
XH L L X H
Z
H
LLH X LX
L
Z
LLX HHX
H
Z
HH H H X X
Z
Z
LL L L L L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = HIGH Impedance
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74ACTQ18825MTD Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC +0.5V
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC +0.5V
DC Output Voltage (VO)
DC Output Source/Sink Current (IO)
DC VCC or Ground Current
Per Output Pin
Storage Temperature
ESD Last Passing Voltage (Min)
0.5V to +7.0V
20 mA
+20 mA
20 mA
+20 mA
0.5V to VCC + 0.5V
±50 mA
±50 mA
65°C to +150°C
4000V
Recommended Operating
Conditions
Supply Voltage (VCC)
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate (Vt)
4.5V to 5.5V
0V to VCC
0V to VCC
40°C to +85°C
125 mV/ns
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACTcircuits outside databook specifications.
DC Electrical Characteristics
Symbol
Parameter
VCC
TA = +25°C
TA = −40°C to +85°C Units
(V) Typ
Guaranteed Limits
Conditions
VIH Minimum HIGH
Input Voltage
VIL Maximum LOW
Input Voltage
VOH Minimum HIGH
Output Voltage
4.5 1.5 2.0 2.0 V VOUT = 0.1V
5.5 1.5 2.0
2.0
or VCC 0.1V
4.5 1.5 0.8 0.8 V VOUT = 0.1V
5.5 1.5 0.8
0.8
or VCC 0.1V
4.5 4.49 4.4
4.4
5.5 5.49 5.4 5.4 V IOUT = −50 µA
VOL Maximum LOW
Output Voltage
4.5 3.86
5.5 4.86
4.5 0.001 0.1
5.5 0.001 0.1
3.76
4.76
0.1
0.1
VIN = VIL or VIH
V IOH = −24 mA
IOH = −24 mA (Note 2)
V IOUT = 50 µA
IOZ
IIN
ICCT
ICC
IOLD
IOHD
VOLP
VOLV
VOHP
Maximum 3-STATE
Leakage Current
Maximum Input Leakage Current
Maximum ICC/Input
Maximum Quiescent Supply Current
Minimum Dynamic
Output Current (Note 2)
Quiet Output
Maximum Dynamic VOL
Quiet Output
Minimum Dynamic VOL
Maximum Overshoot
4.5 0.36
5.5 0.36
5.5 ±0.5
5.5 ± 0.1
5.5 0.6
5.5 8.0
5.5
5.0 0.5 0.8
5.0
0.5
0.8
5.0 VOH + 1.0 VOH + 1.5
0.44
0.44
±5.0
± 1.0
1.5
80.0
75
75
VIN = VIL or VIH
V IOL = 24 mA
IOL = 24 mA (Note 2)
µA VI = VIL, VIH
VO = VCC, GND
µA VI = VCC, GND
mA VI = VCC 2.1V
µA VIN = VCC or GND
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
Figure 1, Figure 2
V
(Note 5)(Note 6)
Figure 1, Figure 2
V
(Note 5)(Note 6)
V Figure 1, Figure 2
(Note 4)(Note 6)
VOHV
Minimum VCC
VCC Droop
5.0 VOH 1.0 VOH 1.8
VIHD
Minimum HIGH Dynamic Input Voltage Level 5.0
1.7
2.0
VILD Maximum LOW Dynamic Input Voltage Level 5.0 1.2 0.8
Note 2: All outputs loaded; thresholds associated with output under test.
Figure 1, Figure 2
V
(Note 4)(Note 6)
V (Note 4)(Note 7)
V (Note 4)(Note 7)
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: Worst case package.
Note 5: Maximum number of outputs that can switch simultaneously is n. (n-1) outputs are switched LOW and one output held LOW.
Note 6: Maximum number of outputs that can switch simultaneously is n. (n-1) outputs are switched HIGH and one output held HIGH.
Note 7: Maximum number of data inputs (n) switching (n-1) input switching 0V to 3V. Input under test switching 3V to threshold (VILD).
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