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PDF 74ACTQ374SJ Data sheet ( Hoja de datos )
| Número de pieza | 74ACTQ374SJ | |
| Descripción | Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs | |
| Fabricantes | Fairchild Semiconductor | |
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April 2007
74ACQ374, 74ACTQ374
Quiet Series™ Octal D-Type Flip-Flop with 3-STATE
tm
Outputs
Features
■ ICC and IOZ reduced by 50%
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
■ Guaranteed pin-to-pin skew AC performance
■ Improved latch-up immunity
■ Buffered positive edge-triggered clock
■ 3-STATE outputs drive bus lines or buffer memory
address registers
■ Outputs source/sink 24mA
■ Faster prop delays than the standard AC/ACT374
General Description
The ACQ/ACTQ374 is a high-speed, low-power octal
D-type flip-flop featuring separate D-type inputs for each
flip-flop and 3-STATE outputs for bus-oriented applica-
tions. A buffered Clock (CP) and Output Enable (OE) are
common to all flip-flops.
The ACQ/ACTQ374 utilizes FACT Quiet Series™ tech-
nology to guarantee quiet output switching and improve
dynamic threshold performance. FACT Quiet Series fea-
tures GTO™ output control and undershoot corrector in
addition to a split ground bus for superior performance.
www.DataSheet4U.com
Ordering Information
Package
Order Number Number
Package Description
74ACQ374SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Body
74ACQ374SJ
74ACTQ374SC
M20D
M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Body
74ACTQ374SJ
74ACTQ374QSC
M20D
MQA20
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Pin Description
Pin Names
D0–D7
CP
OE
O0–O7
Description
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
FACT™, Quiet Series™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.
©1989 Fairchild Semiconductor Corporation
74ACQ374, 74ACTQ374 Rev. 1.3
www.fairchildsemi.com
1 page  
DC Electrical Characteristics for ACTQ
Symbol
Parameter
VIH Minimum HIGH Level
Input Voltage
VIL Maximum LOW Level
Input Voltage
VOH Minimum HIGH Level
Output Voltage
VOL Maximum LOW Level
Output Voltage
IIN(3)
IOZ
ICCT
IOLD
IOHD
ICC(3)
VOLP
VOLV
VIHD
VILD
Maximum Input
Leakage Current
Maximum 3-STATE
Current
Maximum ICC/Input(3)
Minimum Dynamic
Output Current(6)
Maximum Quiescent
Supply Current
Quiet Output Maximum
Dynamic VOL
Quiet Output Minimum
Dynamic VOL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
VCC (V) Conditions
4.5 VOUT = 0.1V or
5.5 VCC – 0.1V
4.5 VOUT = 0.1V or
5.5 VCC – 0.1V
4.5 IOUT = –50µA
5.5
VIN = VIL or VIH:
4.5 IOH = –24mA
5.5 IOH = –24mA(6)
4.5 IOUT = 50µA
5.5
VIN = VIL or VIH:
4.5 IOL = 24mA
5.5 IOL = 24mA(6)
5.5 VI = VCC, GND
TA = +25°C TA = –40°C to +85°C
Typ. Guaranteed Limits Units
1.5 2.0
2.0
V
1.5 2.0
2.0
1.5 0.8
0.8
V
1.5 0.8
0.8
4.49 4.4
4.4
V
5.49 5.4
5.4
0.001
0.001
3.86
4.86
0.1
0.1
3.76
4.76
0.1
0.1
V
V
0.36
0.36
±0.1
0.44
0.44
±1.0
µA
5.5 VI = VIL, VIH;
VO = VCC, GND
±0.25
5.5 VI = VCC – 2.1V
0.6
5.5 VOLD = 1.65V Max.
VOHD = 3.85V Min.
5.5 VIN = VCC or GND
4.0
5.0 Figures 1 & 2(8)
1.1 1.5
±2.5
1.5
75
–75
40.0
µA
mA
mA
mA
µA
V
5.0 Figures 1 & 2(8)
–0.6 –1.2
V
5.0 (9)
1.9 2.2
V
5.0 (9)
1.2 0.8
V
Notes:
6. All outputs loaded; thresholds on input associated with output under test.
7. Maximum test duration 2.0ms, one output loaded at a time.
8. Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND
9. Max number of data inputs (n) switching. (n–1) inputs switching 0V to 3V (ACTQ). Input-under-test switching:
3V to threshold (VILD), 0V to threshold (VIHD), f = 1MHz.
©1989 Fairchild Semiconductor Corporation
74ACQ374, 74ACTQ374 Rev. 1.3
5
www.fairchildsemi.com
5 Page 
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 5. 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Package Number MQA20
©1989 Fairchild Semiconductor Corporation
74ACQ374, 74ACTQ374 Rev. 1.3
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet 74ACTQ374SJ.PDF ] | |
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| 74ACTQ374SC | Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs | Fairchild Semiconductor |
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