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74AHCT02D PDF даташит

Спецификация 74AHCT02D изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Quad 2-input NOR gate».

Детали детали

Номер произв 74AHCT02D
Описание Quad 2-input NOR gate
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74AHCT02D Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
74AHC02; 74AHCT02
Quad 2-input NOR gate
Product specification
Supersedes data of 1998 Dec 18
File under Integrated Circuits, IC06
1999 Sep 23









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74AHCT02D Даташит, Описание, Даташиты
Philips Semiconductors
Quad 2-input NOR gate
Product specification
74AHC02; 74AHCT02
FEATURES
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
CDM EIA/JESD22-C101
exceeds 1000 V
Balanced propagation delays
All inputs have Schmitt-trigger
actions
Inputs accepts voltages higher than
VCC
For AHC only:
operates with CMOS input levels
For AHCT only:
operates with TTL input levels
Specified from
40 to +85 and +125 °C.
DESCRIPTION
The 74AHC/AHCT02 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard
No. 7A.
The 74AHC/AHCT02 provides the
Quad 2-input OR function.
FUNCTION TABLE
See note 1.
INPUT
nA nB
LL
LH
HL
HH
OUTPUT
nY
H
L
L
L
Note
1. H = HIGH voltage level;
L = LOW voltage level.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.
SYMBOL PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC AHCT
tPHL/tPLH propagation delay CL = 15 pF;
nA, nB to nY
VCC = 5 V
2.9 3.8 ns
CI input capacitance VI = VCC or GND 3.0 3.0 pF
CO output capacitance
4.0 4.0 pF
CPD power dissipation CL = 50 pF; 7.0 8.0 pF
capacitance
f = 1 MHz;
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
(CL × VCC2 × fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
PINNING
PIN
1, 4, 10 and 13
2, 5, 8 and 11
3, 6, 9 and 12
7
14
SYMBOL
1Y to 4Y
1A to 4A
1B to 4B
GND
VCC
DESCRIPTION
data outputs
data inputs
data inputs
ground (0 V)
DC supply voltage
1999 Sep 23
2









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74AHCT02D Даташит, Описание, Даташиты
Philips Semiconductors
Quad 2-input NOR gate
ORDERING INFORMATION
OUTSIDE NORTH
AMERICA
NORTH AMERICA
74AHC02D
74AHC02PW
74AHCT02D
74AHCT02PW
74AHC02D
74AHC02PW DH
74AHCT02D
74AHCT02PW DH
PINS
14
14
14
14
Product specification
74AHC02; 74AHCT02
PACKAGES
PACKAGE
MATERIAL
SO
TSSOP
SO
TSSOP
plastic
plastic
plastic
plastic
CODE
SOT108-1
SOT402-1
SOT108-1
SOT402-1
handbook, halfpage
1Y 1
1A 2
1B 3
2Y 4
2A 5
2B 6
GND 7
14 VCC
13 4Y
12 4B
02 11 4A
10 3Y
9 3B
8 3A
MNA214
Fig.1 Pin configuration.
handbook, halfpage
2 1A
3 1B
5 2A
6 2B
8 3A
9 3B
11 4A
12 4B
1Y 1
2Y 4
3Y 10
4Y 13
MNA216
Fig.3 Functional diagram.
1999 Sep 23
handbook, halfpageA
B
Y
MNA215
Fig.2 Logic diagram (one gate).
handbook, halfpage 2 1
3
1
5 1
6
4
8 1 10
9
11 1 13
12
MNA217
Fig.4 IEC logic symbol.
3










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