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PDF 74AHCT30 Data sheet ( Hoja de datos )
| Número de pieza | 74AHCT30 | |
| Descripción | 8-input NAND gate | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
74AHC30; 74AHCT30
8-input NAND gate
Product specification
File under Integrated Circuits, IC06
1999 Nov 30
1 page  
Philips Semiconductors
8-input NAND gate
Product specification
74AHC30; 74AHCT30
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VI
VO
Tamb
DC supply voltage
input voltage
output voltage
operating ambient
temperature
tr,tf (∆t/∆f) input rise and fall rates
CONDITIONS
74AHC
74AHCT
UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
2.0 5.0 5.5 4.5 5.0 5.5 V
0 − 5.5 0 − 5.5 V
0 − VCC 0 − VCC V
see DC and AC
−40 +25 +85 −40 +25 +85 °C
characteristics per device −40 +25 +125 −40 +25 +125 °C
VCC = 3.3 ±0.3 V
− − 100 − − − ns/V
VCC = 5 ±0.5 V
− − 20 − − 20
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
VCC DC supply voltage
VI input voltage
IIK DC input diode current
IOK DC output diode current
IO DC output source or sink current
ICC DC VCC or GND current
Tstg storage temperature
PD power dissipation per package
CONDITIONS
VI < −0.5 V; note 1
VO < −0.5 V or VO > VCC + 0.5 V; note 1
−0.5 V < VO < VCC + 0.5 V
for temperature range from
−40 to +125 °C; note 2
MIN.
−0.5
−0.5
−
−
−
−
−65
−
MAX.
+7.0
+7.0
−20
±20
±25
±75
+150
500
UNIT
V
V
mA
mA
mA
mA
°C
mW
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO-packages: above 70 °C the value of PD derates linearly with 8 mW/K.
For TSSOP-packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.
1999 Nov 30
5
5 Page 
Philips Semiconductors
8-input NAND gate
Product specification
74AHC30; 74AHCT30
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
y
Z
14
8
c
EA
X
HE v M A
pin 1 index
1
e
7
bp
wM
A2
A1
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
mm
1.10
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
D (1) E (2)
e
5.1
4.9
4.5
4.3
0.65
HE
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
EIAJ
SOT402-1
MO-153
L Lp Q
1.0
0.75
0.50
0.4
0.3
v w y Z (1) θ
0.2 0.13
0.1
0.72
0.38
8o
0o
EUROPEAN
PROJECTION
ISSUE DATE
94-07-12
95-04-04
1999 Nov 30
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet 74AHCT30.PDF ] | |
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