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74ALS620AD PDF даташит

Спецификация 74ALS620AD изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Transceivers».

Детали детали

Номер произв 74ALS620AD
Описание Transceivers
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74ALS620AD Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
74ALS620A/74ALS620A–1
74ALS623A/74ALS623A–1
Transceivers
Product specification
IC05 Data Handbook
1991 Feb 08
Philips
Semiconductors









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74ALS620AD Даташит, Описание, Даташиты
Philips Semiconductors
Product specification
Transceivers
74ALS620A/74ALS620A-1
74ALS623A/74ALS623A-1
74ALS620A/74ALS620A-1 Octal bus transceiver, inverting (3-State)
74ALS623A/74ALS623A-1 Octal bus transceiver, non-inverting (3-State)
FEATURES
Octal bidirectional bus interface
3-State buffer outputs sink 24mA and source 15mA
The -1 version sinks 48mA IOL within the +5% VCC range
TYPE
74ALS620A/620A-1
74ALS623A/623A-1
TYPICAL
PROPAGATION
DELAY
4.0ns
4.0ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
33mA
38mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
20-pin plastic DIP
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
74ALS620AN, 74ALS620A-1N
74ALS623AN, 74ALS623A-1N
20-pin plastic SOL
74ALS620AD, 74ALS620A-1D
74ALS623AD, 74ALS623A-1D
DRAWING
NUMBER
SOT146-1
SOT163-1
DESCRIPTION
The 74ALS620A and 74ALS623A are octal transceiver featuring
3-State bus compatible outputs in both transmit and receive
directions. The 74ALS620A is an inverting version of the
74ALS623A. The outputs are capable of sinking 24mA and sourcing
up to 15mA, providing very good capacitive drive characteristics.
The outputs for the 74ALS620A-1 and 74ALS623A are capable of
sinking up to 48mA when within the ±5% VCC range.
These octal bus transceivers are designed for asynchronous
two-way communication between data buses. The control function
implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus
or from B bus to A bus, depending on the logic levels at the enable
inputs (OEBA and OEAB). The enable inputs can be used to disable
the device so that the buses are effectively isolated. The
dual-enable configuration gives the 74ALS620A and 74ALS623A the
capability to store data by the simultaneous enabling of OEBA and
OEAB. Each output reinforces its input in this transceiver
configuration. Thus when both control inputs are enabled and all
other data sources to the two sets of the bus lines are at high
impedance, both sets of the bus lines (16 in all) will remain at their
last states.
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74ALS (U.L.)
HIGH/LOW
A0 – A7, B0 – B7
Data inputs
1.0/1.0
OEBA, OEAB
Output Enable inputs
1.0/1.0
A0 – A7, B0 – B7
Data outputs
750/240
A0 – A7, B0 – B7
Data outputs (-1 version)
750/480
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOAD VALUE
HIGH/LOW
20µA/0.1mA
20µA/0.1mA
15mA/24mA
15mA/48mA
PIN CONFIGURATION – 74ALS620A/74ALS620A-1
PIN CONFIGURATION – 74ALS623A/74ALS623A-1
OEAB 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OEBA
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
SC00101
OEAB 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OEBA
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
SC00102
1991 Feb 08
2 853–0020 01670









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74ALS620AD Даташит, Описание, Даташиты
Philips Semiconductors
Transceivers
Product specification
74ALS620A/74ALS620A-1
74ALS623A/74ALS623A-1
LOGIC SYMBOL – 74ALS620A/74ALS620A-1
23456789
A0 A1 A2 A3 A4 A5 A6 A7
1 OEAB
19 OEBA
B0 B1 B2 B3 B4 B5 B6 B7
VCC = Pin 20
GND = Pin 10
18 17 16 15 14 13 12 11
SC00103
IEC/IEEE SYMBOL – 74ALS620A/74ALS620A-1
1
EN1
19
EN2
21
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
SC00105
LOGIC SYMBOL – 74ALS623A/74ALS623A-1
23456789
A0 A1 A2 A3 A4 A5 A6 A7
1 OEAB
19 OEBA
B0 B1 B2 B3 B4 B5 B6 B7
VCC = Pin 20
GND = Pin 10
18 17 16 15 14 13 12 11
SC00104
IEC/IEEE SYMBOL – 74ALS623A/74ALS623A-1
1
EN1
19
EN2
21
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
SC00106
1991 Feb 08
3










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