74ALVC02 PDF даташит
Спецификация 74ALVC02 изготовлена «NXP Semiconductors» и имеет функцию, называемую «Quad 2-input NOR gate». |
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Детали детали
Номер произв | 74ALVC02 |
Описание | Quad 2-input NOR gate |
Производители | NXP Semiconductors |
логотип |
13 Pages
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INTEGRATED CIRCUITS
DATA SHEET
74ALVC02
Quad 2-input NOR gate
Product specification
Supersedes data of 2003 Feb 05
2003 Jul 14
No Preview Available ! |
Philips Semiconductors
Quad 2-input NOR gate
Product specification
74ALVC02
FEATURES
• Wide supply voltage range from 1.65 to 3.6 V
• 3.6 V tolerant inputs/outputs
• CMOS low power consumption
• Direct interface with TTL levels (2.7 to 3.6 V)
• Power-down mode
• Latch-up performance exceeds 250 mA
• Complies with JEDEC standard:
JESD8-7 (1.65 to 1.95 V)
JESD8-5 (2.3 to 2.7 V)
JESD8B/JESD36 (2.7 to 3.6 V).
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
DESCRIPTION
The 74ALVC02 is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit
tolerant for slower input rise and fall times.
The 74ALVC02 provides the 2-input NOR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C.
SYMBOL
PARAMETER
tPHL/tPLH propagation delay nA, nB to nY
CI input capacitance
CPD power dissipation capacitance per buffer
CONDITIONS
VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ
VCC = 2.5 V; CL = 30 pF; RL = 500 Ω
VCC = 2.7 V; CL = 50 pF; RL = 500 Ω
VCC = 3.3 V; CL = 50 pF; RL = 500 Ω
VCC = 3.3 V; notes 1 and 2
TYPICAL UNIT
2.8 ns
2.0 ns
2.5 ns
2.2 ns
3.5 pF
32 pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC.
2003 Jul 14
2
No Preview Available ! |
Philips Semiconductors
Quad 2-input NOR gate
Product specification
74ALVC02
ORDERING INFORMATION
TYPE NUMBER
74ALVC02D
74ALVC02PW
74ALVC02BQ
TEMPERATURE
RANGE
−40 to +85 °C
−40 to +85 °C
−40 to +85 °C
FUNCTION TABLE
See note 1.
nA
L
L
H
H
Note
1. H = HIGH voltage level;
L = LOW voltage level
INPUT
PINNING
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYMBOL
1Y
1A
1B
2Y
2A
2B
GND
3A
3B
3Y
4A
4B
4Y
VCC
DESCRIPTION
data output
data input
data input
data output
data input
data input
ground (0 V)
data input
data input
data output
data input
data input
data output
supply voltage
PINS
14
14
14
PACKAGE
PACKAGE
SO14
TSSOP14
DHVQFN14
MATERIAL
plastic
plastic
plastic
CODE
SOT108-1
SOT402-1
SOT762-1
OUTPUT
nB nY
LH
HL
LL
HL
handbook, halfpage
1Y 1
1A 2
1B 3
2Y 4
2A 5
2B 6
GND 7
14 VCC
13 4Y
12 4B
02 11 4A
10 3Y
9 3B
8 3A
MNA214
Fig.1 Pin configuration SO14 and TSSOP14.
2003 Jul 14
3
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