74ALVC16373 Datasheet PDF - Fairchild Semiconductor
| Part Number | 74ALVC16373 | |
| Description | Low Voltage 16-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs | |
| Manufacturers | Fairchild Semiconductor | |
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October 2001
Revised October 2001
74ALVC16373
Low Voltage 16-Bit Transparent Latch
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear to be transparent to the data when the Latch
Enable (LE) is HIGH. When LE is LOW, the data that meets
the setup time is latched. Data appears on the bus when
the Output Enable (OE) is LOW. When OE is HIGH, the
outputs are in a high impedance state.
The 74ALVC16373 is designed for low voltage (1.1V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74ALVC16373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.1V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD (In to On)
3.5 ns max for 3.0V to 3.6V VCC
3.9 ns max for 2.3V to 2.7V VCC
6.8 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Support live insertion and withdrawal (Note 1)
s Uses patented noise/EMI reduction circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74ALVC16373GX
(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
74ALVC16373MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2: BGA package available in Tape and Reel only.
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
© 2001 Fairchild Semiconductor Corporation DS500687
www.fairchildsemi.com
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AC Electrical Characteristics
Symbol
Parameter
tPHL, tPLH Propagation Delay
Bus to Bus
tPHL, tPLH Propagation Delay
LE to Bus
tPZL, tPZH Output Enable Time
tPLZ, tPHZ Output Disable Time
T A = −40°C to +85°C, RL = 500Ω
CL = 50 pF
CL = 30 pF
V CC = 3.3V ± 0.3V
V CC = 2.7V
V CC = 2.5V ± 0.2V V CC = 1.8V ± 0.15V
Min Max Min Max Min Max Min Max
1.3 3.5 1.5 3.9 1.0 3.4 1.5 6.8
1.3 3.5 1.5 4.4 1.0 3.9 1.5 7.8
1.3 4.0 1.5 5.1 1.0 4.6 1.5 9.2
1.3 4.0 1.5 4.3 1.0 3.8 1.5 6.8
Capacitance
Units
ns
ns
ns
ns
Symbol
Parameter
Conditions
CIN
COUT
CPD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Outputs Enabled
VI = 0V or VCC
VI = 0V or VCC
f = 10 MHz, CL = 50 pF
TA = +25°C
VCC Typical
3.3 6
3.3 7
3.3 20
2.5 20
Units
pF
pF
pF
5 www.fairchildsemi.com
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 74ALVC16373 electronic component. |
| Information | Total 8 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ 74ALVC16373.PDF Datasheet ] | |
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