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PDF 74ALVCF322835G Data sheet ( Hoja de datos )
| Número de pieza | 74ALVCF322835G | |
| Descripción | Low Voltage 36-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26 Series Resistors in Outputs | |
| Fabricantes | Fairchild Semiconductor | |
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May 2002
Revised May 2002
74ALVCF322835
Low Voltage 36-Bit Universal Bus Driver
with 3.6V Tolerant Outputs
and 26Ω Series Resistors in Outputs
General Description
The 74ALVCF322835 low voltage 36-bit universal bus
driver combines D-type latches and D-type flip-flops to
allow data flow in transparent, latched and clocked modes.
Data flow is controlled by output-enable (OE), latch-enable
(LE), and clock (CLK) inputs. The device operates in
Transparent Mode when LE is held HIGH. The device
operates in clocked mode when LE is LOW and CLK is tog-
gled. Data transfers from the Inputs (In) to Outputs (On) on
a Positive Edge Transition of the Clock. When OE is LOW,
the output data is enabled. When OE is HIGH the output
port is in a high impedance state.
The 74ALVCF322835 is designed with 26Ω series resistors
in the outputs. This design reduces noise in applications
such as memory address drivers, clock drivers, and bus
transceivers/transmitters.
The 74ALVCF322835 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O capability up to 3.6V.
The 74ALVCF322835 is fabricated with an advanced
CMOS technology to achieve high speed operation while
maintaining low CMOS power dissipation.
Features
s Compatible with PC133 DIMM module specifications
s 1.65V to 3.6V VCC specifications provided
s 3.6V tolerant outputs
s 26Ω series resistors in outputs
s tPD (CLK to On)
3.7 ns max for 3.0V to 3.6V VCC
4.6 ns max for 2.3V to 2.7V VCC
7.4 ns max for 1.65V to 1.95V VCC
s Power-down high impedance outputs
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model >200V
Ordering Code:
Order Number
Package
Number
Package Description
74ALVCF322835G
(Note 1) (Note 2)
BGA114A 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 1: Ordering Code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2002 Fairchild Semiconductor Corporation DS500741
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Symbol
Parameter
fMAX
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tPZL, tPZH
tPLZ, tPHZ
tS
tH
tW
Maximum Clock Frequency
Propagation Delay
Bus-to-Bus
Propagation Delay
Clock to Bus
Propagation Delay
LE to Bus
Output Enable Time
Output Disable Time
Setup Time
Hold Time
Pulse Width
Capacitance
TA = −40°C to +85°C, RL = 500Ω
CL = 50 pF
CL = 30 pF
VCC = 3.3V ± 0.3V
VCC = 2.7V
VCC = 2.5 ± 0.2V VCC = 1.8V ± 0.15V
Min Max Min Max Min Max Min Max
250 200 200 100
Units
MHz
1.1 3.6 1.3 4.5 0.8 4.0 1.5 7.2 ns
1.5 3.7 2.0 4.6 1.5 4.1 2.0 7.4 ns
1.1 4.2 1.3 5.2 0.8 4.7 1.5 8.5 ns
1.1 4.8 1.3 6.4 0.8 5.9 1.5 9.8
1.1 4.7 1.3 5.2 0.8 4.7 1.5 7.9
1.5 1.5 1.5 2.5
0.7 0.7 0.7 1.0
1.5 1.5 1.5 4.0
ns
ns
ns
ns
ns
Symbol
Parameter
Conditions
CIN
COUT
CPD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Outputs Enabled
VI = 0V or VCC
VI = 0V or VCC
f = 10 MHz, CL = 0 pF
TA = +25°C
VCC Typical
3.3 3.5
3.3 5.5
3.3 13
2.5 13
Units
pF
pF
pF
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74ALVCF322835G.PDF ] | |
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