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74ALVCH16245 PDF даташит

Спецификация 74ALVCH16245 изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «16-bit transceiver».

Детали детали

Номер произв 74ALVCH16245
Описание 16-bit transceiver
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74ALVCH16245 Даташит, Описание, Даташиты
74ALVC16245; 74ALVCH16245
16-bit transceiver with direction pin; 3-state
Rev. 03 — 12 May 2004
Product data sheet
1. General description
The 74ALVC16245; 74ALVCH16245 is a 16-bit transceiver featuring non-inverting 3-state
bus compatible outputs in both send and receive directions.
The 74ALVC16245; 74ALVCH16245 features two output enable inputs (pins nOE) for
easy cascading and two send or receive inputs (pins nDIR) for direction control. Pins nOE
control the outputs so that the buses are effectively isolated. This device can be used as
two 8-bit transceivers or one 16-bit transceiver.
The 74ALVCH16245 has an active bushold circuitry which is provided to hold unused or
floating data inputs at a valid logic level. This feature eliminates the need for external
pull-up or pull-down resistors.
2. Features
s Wide supply voltage range from 1.2 V to 3.6 V
s Complies with JEDEC standard JESD8-B
s CMOS low power consumption
s MULTIBYTE flow-through standard pin-out architecture
s Low inductance multiple VCC and GND pins for minimize noise and ground bounce
s Direct interface with TTL levels
s All data inputs have bushold (74ALVCH16245 only)
s Output drive capability 50 transmission lines at 85 °C
s Current drive ±24 mA at VCC = 3.0 V.









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74ALVCH16245 Даташит, Описание, Даташиты
Philips Semiconductors
74ALVC16245; 74ALVCH16245
16-bit bus transceiver with direction pin; 3-state
3. Quick reference data
Table 1: Quick reference data
Symbol Parameter
Conditions
tPHL, tPLH propagation delay
An to Bn; Bn to An
CI input capacitance
CI/O input/output
capacitance
VCC = 2.5 V; CL = 30 pF
VCC = 3.3 V; CL = 50 pF
CPD
power dissipation
outputs enabled
capacitance per buffer outputs disabled
Min Typ Max Unit
- 2.0 - ns
- 1.9 - ns
- 4.0 - pF
- 8.0 - pF
[1] [2] -
[1] [2] -
29 -
5-
pF
pF
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
(CL × VCC2 × fo) = sum of outputs.
[2] The condition is VI = GND to VCC.
4. Ordering information
Table 2: Ordering information
Type number
Package
Temperature range Name
74ALVC16245DGG 40 °C to +85 °C TSSOP48
74ALVCH16245DGG 40 °C to +85 °C
74ALVC16245DL
40 °C to +85 °C SSOP48
74ALVCH16245DL 40 °C to +85 °C
Description
plastic thin shrink small outline package;
48 leads; body width 6.1 mm
plastic shrink small outline package; 48 leads;
body width 7.5 mm
Version
SOT362-1
SOT370-1
9397 750 13117
Product data sheet
Rev. 03 — 12 May 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
2 of 17









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74ALVCH16245 Даташит, Описание, Даташиты
Philips Semiconductors
5. Functional diagram
74ALVC16245; 74ALVCH16245
16-bit bus transceiver with direction pin; 3-state
1 24
1DIR 2DIR
47 1A0
1B0 2
46 1A1
1B1 3
44 1A2
1B2 5
43 1A3
1B3 6
41 1A4
1B4 8
40 1A5
1B5 9
38 1A6
1B6 11
37 1A7
1B7 12
36 2A0
2B0 13
35 2A1
2B1 14
33 2A2
2B2 16
32 2A3
2B3 17
30 2A4
2B4 19
29 2A5
2B5 20
27 2A6
2B6 22
26 2A7
2B7 23
1OE 2OE
48 25 001aaa853
Fig 1. Logic symbol.
VCC
data
input
Fig 3. Bushold circuit.
1OE 48
1DIR 1
2OE 25
2DIR 24
G3
3EN1[BA]
3EN2[AB]
G6
6EN1[BA]
6EN2[AB]
1A0 47
1A1 46
1A2 44
1A3 43
1A4 41
1A5 40
38
1A6
1A7 37
2A0 36
2A1 35
2A2 33
32
2A3
2A4 30
29
2A5
27
2A6
2A7 26
1
2
4
5
Fig 2. IEC logic symbol.
2 1B0
3 1B1
5 1B2
6 1B3
8 1B4
9 1B5
11 1B6
12 1B7
13 2B0
14 2B1
16 2B2
17 2B3
19 2B4
20 2B5
22 2B6
23 2B7
001aaa790
to internal circuit
mna004
9397 750 13117
Product data sheet
Rev. 03 — 12 May 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
3 of 17










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