74AVC16244DGG PDF даташит
Спецификация 74AVC16244DGG изготовлена «NXP Semiconductors» и имеет функцию, называемую «16-bit buffer/line driver; 3-state 3.6 V tolerant». |
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Детали детали
Номер произв | 74AVC16244DGG |
Описание | 16-bit buffer/line driver; 3-state 3.6 V tolerant |
Производители | NXP Semiconductors |
логотип |
16 Pages
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INTEGRATED CIRCUITS
DATA SHEET
74AVC16244
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
Product specification
Supersedes data of 1998 Dec 11
File under Integrated Circuits, IC24
1999 Nov 15
No Preview Available ! |
Philips Semiconductors
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
Product specification
74AVC16244
FEATURES
• Wide supply voltage range from 1.2 to 3.6 V
• Complies with JEDEC standard no. 8-1A/5/7
• CMOS low power consumption
• Input/output tolerant up to 3.6 V
• Dynamic Controlled Output (DCO) circuit dynamically
changes output impedance, resulting in noise reduction
without speed degradation
• Low inductance multiple power and ground pins for
minimum noise and ground bounce
• Power off disables 74AVC16244 outputs, permitting live
insertion.
DESCRIPTION
The 74AVC16244 is a 16-bit non-inverting buffer/line
driver with 3-state outputs. This device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer.
The 3-state outputs are controlled by the output enable
inputs nOE. A HIGH level on input nOE causes the outputs
to assume a high-impedance OFF-state.
This product is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
To ensure the high-impedance output state during
power-up or power-down, input nOE should be tied to VCC
through a pull-up resistor (live insertion).
A DCO circuitry is implemented to support termination line
drive during transient (see Figs 1 and 2).
handbook, h0alfpage
I OH
(mA)
1.8 V
−100
MNA506
2.5 V
−200
3.3 V
−300
01234
VOH (V)
300
handbook, halfpage
IOL
(mA)
200
3.3 V
2.5 V
100
1.8 V
MNA507
0
01234
VOL (V)
Fig.1 Output current as a function of output voltage.
Fig.2 Output current as a function of output voltage.
1999 Nov 15
2
No Preview Available ! |
Philips Semiconductors
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.0 ns; CL = 30 pF.
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
CI
CPD
propagation delay
nAn to nYn
input capacitance
power dissipation
capacitance per buffer
VCC = 1.2 V
VCC = 1.5 V
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
notes 1 and 2
outputs enabled
outputs disabled
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
∑ (CL × VCC2 × fo) = sum of outputs.
2. The condition is VI = GND to VCC.
FUNCTION TABLE
See note 1.
INPUTS
nOE
L
L
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
nAn
L
H
X
Product specification
74AVC16244
TYP.
2.6
1.8
1.7
1.3
1.1
5.0
34
1
UNIT
ns
ns
ns
ns
ns
pF
pF
pF
OUTPUTS
nYn
L
H
Z
1999 Nov 15
3
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74AVC16244DGG | 16-bit buffer/line driver; 3-state 3.6 V tolerant | NXP Semiconductors |
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