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PDF 74F163ASJ Data sheet ( Hoja de datos )
| Número de pieza | 74F163ASJ | |
| Descripción | Synchronous Presettable Binary Counter | |
| Fabricantes | Fairchild Semiconductor | |
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April 1988
Revised July 1999
74F161A • 74F163A
Synchronous Presettable Binary Counter
General Description
The 74F161A and 74F163A are high-speed synchronous
modulo-16 binary counters. They are synchronously pre-
settable for application in programmable dividers and have
two types of Count Enable inputs plus a Terminal Count
output for versatility in forming synchronous multi-stage
counters. The 74F161A has an asynchronous Master-
Reset input that overrides all other inputs and forces the
outputs LOW. The 74F163A has a Synchronous Reset
input that overrides counting and parallel loading and
allows the outputs to be simultaneously reset on the rising
edge of the clock. The 74F161A and 74F163A are high-
speed versions of the 74F161 and 74F163.
Features
s Synchronous counting and loading
s High-speed synchronous expansion
s Typical count frequency of 120 MHz
Ordering Code:
Order Number Package Number
Package Description
74F161ASC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F161ASJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F161APC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74F163ASC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F163ASJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F163APC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
74F161A
74F163A
© 1999 Fairchild Semiconductor Corporation DS009486
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Symbol
Parameter
fMAX
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPHL
tPHL
Maximum Count Frequency
Propagation Delay
CP to Qn (PE Input HIGH)
Propagation Delay
CP to Qn (PE Input LOW)
Propagation Delay
CP to TC
Propagation Delay
CET to TC
Propagation Delay
MR to Qn (74F161A)
Propagation Delay
MR to TC (74F161A)
TA = +25°C
VCC = +5.0V
CL = 50 pF
Min Typ Max
100 120
3.5 5.5 7.5
3.5 7.5 10.0
4.0 6.0 8.5
4.0 6.0 8.5
5.0 10.0 14.0
5.0 10.0 14.0
2.5 4.5 7.5
2.5 4.5 7.5
5.5 9.0 12.0
TA = −55°C to +125°C
VCC = +5.0V
CL = 50 pF
Min Max
75
3.5 9.0
3.5 11.5
4.0 10.0
4.0 10.0
5.0 16.5
5.0 15.5
2.5 9.0
2.5 9.0
5.5 14.0
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
Min Max
90
3.5 8.5
3.5 11.0
4.0 9.5
4.0 9.5
5.0 15.0
5.0 15.0
2.5 8.5
2.5 8.5
5.5 13.0
4.5 8.0 10.5 4.5 12.5 4.5 11.5
AC Operating Requirements
Symbol
Parameter
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tW(H)
tW(L)
tW(H)
tW(L)
tW(L)
tREC
Setup Time, HIGH or LOW
Pn to CP
Hold Time, HIGH or LOW
Pn to CP
Setup Time, HIGH or LOW
PE or SR to CP
Hold Time, HIGH or LOW
PE or SR to CP
Setup Time, HIGH or LOW
CEP or CET to CP
Hold Time, HIGH or LOW
CEP or CET to CP
Clock Pulse Width (Load)
HIGH or LOW
Clock Pulse Width (Count)
HIGH or LOW
MR Pulse Width, LOW
(74F161A)
Recovery Time
MR to CP (74F161A)
TA = +25°C
VCC = +5.0V
Min Max
5.0
5.0
2.0
2.0
11.0
8.5
2.0
0
11.0
5.0
0
0
5.0
5.0
4.0
6.0
5.0
6.0
TA = −55°C to +125°C
VCC = +5.0V
Min Max
5.5
5.5
2.5
2.5
13.5
10.5
3.6
0
13.0
6.0
0
0
5.0
5.0
5.0
8.0
5.0
TA = 0°C to +70°C
VCC = +5.0V
Min Max
5.0
5.0
2.0
2.0
11.5
9.5
2.0
0
11.5
5.0
0
0
5.0
5.0
4.0
7.0
5.0
6.0 6.0
Units
MHz
ns
ns
ns
ns
ns
Units
ns
ns
ns
ns
ns
ns
ns
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