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74F169 PDF даташит

Спецификация 74F169 изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «4-bit up/down binary synchronous counter».

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Номер произв 74F169
Описание 4-bit up/down binary synchronous counter
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74F169 Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
74F168*, 74F169
4-bit up/down binary synchronous counter
* Discontinued part. Please see the Discontinued Product List in Section 1, page 21.
Product specification
IC15 Data Handbook
1996 Jan 05
Philips
Semiconductors









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74F169 Даташит, Описание, Даташиты
Philips Semiconductors
4-bit up/down binary synchronous counter
Product specification
74F169
FEATURES
Synchronous counting and loading
Up/Down counting
Modulo 16 binary counter
Two Count Enable inputs for n-bit cascading
Positive edge-triggered clock
Built-in carry look-ahead capability
Presettable for programmable operation
DESCRIPTION
The 74F169 is a 4-bit synchronous, presettable Modulo 16 up/down
counter featuring an internal carry look-ahead for applications in
high-speed counting designs. Synchronous operation is provided by
having all flip-flops clocked simultaneously so that the outputs
change coincident with each other when instructed by the Count
Enable inputs and internal gating. This mode of operation eliminates
the output spikes which are normally associated with asynchronous
(ripple clock) counters. A buffered clock input triggers the flip-flops
on the Low-to-High transition of the clock.
The counter is fully programmable; that is, the outputs may be
preset to either level.
Presetting is synchronous with the clock and takes place regardless
of the levels of the Count Enable inputs. A Low level on the Parallel
Enable (PE) input disables the counter and causes the data at the
Dn input to be loaded into the counter on the next Low-to-High
transition of the clock.
The direction of counting is controlled by the Up/Down (U/D) input; a
High will cause the count to increase, a Low will cause the count to
decrease.
The carry look-ahead circuitry provides for n-bit synchronous
applications without additional gating. Instrumental in accomplishing
this function are two Count Enable inputs (CET, CEP) and a
Terminal Count (TC) output. Both Count Enable inputs must be Low
to count. The CET input is fed forward to enable the TC output. The
TC output thus enabled will produce a Low output pulse with a
duration approximately equal to the High level portion of the Q0
output. The Low level TC pulse is used to enable successive
cascaded stages.
PIN CONFIGURATION
U/D 1
CP 2
D0 3
D1 4
D2 5
D3 6
CEP 7
GND 8
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 CET
9 PE
SF00766
TYPE
74F169
TYPICAL fMAX
115MHz
TYPICAL
SUPPLY CURRENT
(TOTAL)
35mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
16-pin plastic DIP
N74F169N
16-pin plastic SO
N74F169D
PKG
DWG #
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
D0 - D3
CEP
Parallel data inputs
Count Enable parallel input (active Low)
1.0/1.0
1.0/1.0
CET
Count Enable Trickle input (active Low)
1.0/2.0
CP Clock input (active rising edge)
1.0/1.0
PE Parallel Enable input (active Low)
1.0/1.0
U/D Up/Down count control input
1.0/1.0
Q0 - Q3
Flip-flop outputs
50/33
TC Terminal count output (active Low)
50/33
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE
HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/1.2mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
1.0mA/20mA
1.0mA/20mA
1996 Jan 05
2 853–0350 16190









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74F169 Даташит, Описание, Даташиты
Philips Semiconductors
4-bit up/down binary synchronous counter
Product specification
74F169
LOGIC SYMBOL
9 PE
1 U/D
2 CP
7 CEP
10 CET
3456
D0 D1 D2 D3
TC
Q0 Q1 Q2 Q3
15
VCC = Pin 16
GND = Pin 8
14 13 12 11
SF00786
LOGIC SYMBOL (IEEE/IEC)
CTR DIV 16
9
M1 [LOAD]
M2 [COUNT]
1 M3 [UP]
M4 [DOWN]
10 G5
3, 5 CT=15
15
7 G6
4, 5 CT=0
2 2, 3, 5, 6+/C7
2, 4, 5, 6–
3
1, 7D
[1]
4 [2]
5 [4]
6 [8]
14
13
12
11
SF00787
FUNCTIONAL DESCRIPTION
The 74F169 uses edge-triggered J-K-type flip-flops and have no
constraints on changing the control or data input signals in either
state of the clock. The only requirement is that the various inputs
attain the desired state at least a setup time before the rising edge
of the clock and remain valid for the recommended hold time
thereafter. The parallel load operation takes precedence over the
other operations, as indicated in the Mode Select Table. When PE is
Low, the data on the D0 - D3 inputs enter the flip-flops on the next
rising edge of the Clock. In order for counting to occur, both CEP
and CET must be Low and PE must be High; the U/D input
determines the direction of counting. The Terminal Count (TC)
output is normally High and goes Low, provided that CET is Low,
when a counter reaches zero in the Count Down mode or reaches
15 in the Count Up mode. The TC output state is not a function of
the Count Enable Parallel (CEP) input level. Since the TC signal is
derived by decoding the flip-flop states, there exists the possibility of
decoding spikes on TC. For this reason the use of TC as a clock
signal is not recommended (see logic equations below).
1) Count Enable = CEPCETPE
2) Up: TC = Q0Q3(U/D)CET
3) Down: TC = Q0Q1Q2Q3(U/D)CET
MODE SELECT — FUNCTION TABLE
INPUTS
CP
U/D
CEP
CET
PE
XXX
l
XXXX
Dn
l
X
OUTPUTS
Qn
L
H
TC
(1)
(1)
OPERATING MODE
Parallel load (DnQn)
h l
l
h
X
Count Up
(1) Count Up (increment)
l
l
l
h
X
Count Down
(1) Count Down (decrement)
XhXhX
qn (1) Hold (do nothing)
X X X h X qn H
H = High voltage level steady state
h = High voltage level one setup time prior to the Low-to-High clock transition
L = Low voltage level steady state
l = Low voltage level one setup time prior to the Low-to-High clock transition
q = Lower case letters indicate the state of the referenced output prior to the Low-to-High clock transition
X = Don’t care
= Low-to-High clock transition
(1) = The TC is Low when CET is Low and the counter is at Terminal Count.
Terminal Count Up is (HHHH) and Terminal Count Down is (LLLL).
1996 Jan 05
3










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